ddbf5654b4
Add initial arch/arm/mach-s3c24a0/include/mach header files for supporting Samsung S3C24A0 SoC. Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
115 lines
3.6 KiB
C
115 lines
3.6 KiB
C
/* linux/arch/arm/mach-s3c24a0/include/mach/irqs.h
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*
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* Copyright (c) 2003-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_24A0_IRQS_H
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#define __ASM_ARCH_24A0_IRQS_H __FILE__
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#define IRQ_EINT0t2 S3C2410_IRQ(0) /* 16 */
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/* for generic entry-macro.S */
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#define IRQ_EINT0 IRQ_EINT0t2
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#define IRQ_EINT3t6 S3C2410_IRQ(1)
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#define IRQ_EINT7t10 S3C2410_IRQ(2)
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#define IRQ_EINT11t14 S3C2410_IRQ(3)
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#define IRQ_EINT15t18 S3C2410_IRQ(4) /* 20 */
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#define IRQ_TICK S3C2410_IRQ(5)
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#define IRQ_DCTQ S3C2410_IRQ(6)
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#define IRQ_MC S3C2410_IRQ(7)
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#define IRQ_ME S3C2410_IRQ(8) /* 24 */
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#define IRQ_KEYPAD S3C2410_IRQ(9)
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#define IRQ_TIMER0 S3C2410_IRQ(10)
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#define IRQ_TIMER1 S3C2410_IRQ(11)
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#define IRQ_TIMER2 S3C2410_IRQ(12)
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#define IRQ_TIMER3_4 S3C2410_IRQ(13)
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#define IRQ_OS_TIMER IRQ_TIMER3_4
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#define IRQ_LCD S3C2410_IRQ(14)
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#define IRQ_CAM_C S3C2410_IRQ(15)
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#define IRQ_WDT_BATFLT S3C2410_IRQ(16) /* 32 */
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#define IRQ_UART0 S3C2410_IRQ(17)
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#define IRQ_CAM_P S3C2410_IRQ(18)
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#define IRQ_MODEM S3C2410_IRQ(19)
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#define IRQ_DMA S3C2410_IRQ(20)
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#define IRQ_SDI S3C2410_IRQ(21)
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#define IRQ_SPI0 S3C2410_IRQ(22)
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#define IRQ_UART1 S3C2410_IRQ(23)
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#define IRQ_AC97_NFLASH S3C2410_IRQ(24) /* 40 */
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#define IRQ_USBD S3C2410_IRQ(25)
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#define IRQ_USBH S3C2410_IRQ(26)
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#define IRQ_IIC S3C2410_IRQ(27)
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#define IRQ_IRDA_MSTICK S3C2410_IRQ(28) /* 44 */
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#define IRQ_VLX_SPI1 S3C2410_IRQ(29)
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#define IRQ_RTC S3C2410_IRQ(30) /* 46 */
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#define IRQ_ADC_PEN S3C2410_IRQ(31)
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/* interrupts generated from the external interrupts sources */
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#define IRQ_EINT00 S3C2410_IRQ(32) /* 48 */
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#define IRQ_EINT1 S3C2410_IRQ(33)
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#define IRQ_EINT2 S3C2410_IRQ(34)
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#define IRQ_EINT3 S3C2410_IRQ(35)
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#define IRQ_EINT4 S3C2410_IRQ(36)
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#define IRQ_EINT5 S3C2410_IRQ(37)
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#define IRQ_EINT6 S3C2410_IRQ(38)
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#define IRQ_EINT7 S3C2410_IRQ(39)
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#define IRQ_EINT8 S3C2410_IRQ(40)
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#define IRQ_EINT9 S3C2410_IRQ(41)
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#define IRQ_EINT10 S3C2410_IRQ(42)
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#define IRQ_EINT11 S3C2410_IRQ(43)
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#define IRQ_EINT12 S3C2410_IRQ(44)
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#define IRQ_EINT13 S3C2410_IRQ(45)
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#define IRQ_EINT14 S3C2410_IRQ(46)
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#define IRQ_EINT15 S3C2410_IRQ(47)
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#define IRQ_EINT16 S3C2410_IRQ(48)
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#define IRQ_EINT17 S3C2410_IRQ(49)
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#define IRQ_EINT18 S3C2410_IRQ(50)
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/* SUB IRQS */
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#define IRQ_S3CUART_RX0 S3C2410_IRQ(51) /* 67 */
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#define IRQ_S3CUART_TX0 S3C2410_IRQ(52)
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#define IRQ_S3CUART_ERR0 S3C2410_IRQ(53)
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#define IRQ_S3CUART_RX1 S3C2410_IRQ(54)
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#define IRQ_S3CUART_TX1 S3C2410_IRQ(55)
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#define IRQ_S3CUART_ERR1 S3C2410_IRQ(56)
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#define IRQ_S3CUART_RX2 (0x0)
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#define IRQ_S3CUART_TX2 (0x0)
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#define IRQ_S3CUART_ERR2 (0x0)
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#define IRQ_IRDA S3C2410_IRQ(57)
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#define IRQ_MSTICK S3C2410_IRQ(58)
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#define IRQ_RESERVED0 S3C2410_IRQ(59)
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#define IRQ_RESERVED1 S3C2410_IRQ(60)
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#define IRQ_RESERVED2 S3C2410_IRQ(61)
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#define IRQ_TIMER3 S3C2410_IRQ(62)
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#define IRQ_TIMER4 S3C2410_IRQ(63)
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#define IRQ_WDT S3C2410_IRQ(64)
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#define IRQ_BATFLT S3C2410_IRQ(65)
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#define IRQ_POST S3C2410_IRQ(66)
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#define IRQ_DISP_FIFO S3C2410_IRQ(67)
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#define IRQ_PENUP S3C2410_IRQ(68)
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#define IRQ_PENDN S3C2410_IRQ(69)
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#define IRQ_ADC S3C2410_IRQ(70)
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#define IRQ_DISP_FRAME S3C2410_IRQ(71)
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#define IRQ_NFLASH S3C2410_IRQ(72)
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#define IRQ_AC97 S3C2410_IRQ(73)
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#define IRQ_SPI1 S3C2410_IRQ(74)
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#define IRQ_VLX S3C2410_IRQ(75)
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#define IRQ_DMA0 S3C2410_IRQ(76)
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#define IRQ_DMA1 S3C2410_IRQ(77)
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#define IRQ_DMA2 S3C2410_IRQ(78)
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#define IRQ_DMA3 S3C2410_IRQ(79)
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#define IRQ_TC (0x0)
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#define NR_IRQS (IRQ_DMA3+1)
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#endif /* __ASM_ARCH_24A0_IRQS_H */
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