kernel-fxtec-pro1x/drivers/clk/pistachio
Damien.Horsley d31ff5f7f3 clk: pistachio: correct critical clock list
Current critical clock list for pistachio enables
only mips and sys clocks by default but there are
also other clocks that are not claimed by anyone and
needs to be enabled by default.

This patch updates the critical clocks that need
to be enabled by default.

Add a separate struct to distinguish the critical clocks
as listed:
1.) core clocks:
	a.) mips clock
2.) peripheral system clocks:
	a.) sys clock
	b.) sys_bus clock
	c.) DDR clock
	d.) ROM clock

Fixes: b35d7c33419c("CLK: Pistachio: Register core clocks")
Cc: <stable@vger.kernel.org> # 4.1
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Damien.Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-26 11:34:43 -07:00
..
clk-pistachio.c clk: pistachio: correct critical clock list 2015-08-26 11:34:43 -07:00
clk-pll.c clk: pistachio: Fix PLL rate calculation in integer mode 2015-08-26 11:34:41 -07:00
clk.c
clk.h clk: pistachio: Fix 32bit integer overflows 2015-08-26 11:34:28 -07:00
Makefile