1965aae3c9
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since: a. the double underscore is ugly and pointless. b. no leading underscore violates namespace constraints. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
204 lines
4.3 KiB
C
204 lines
4.3 KiB
C
#ifndef _ASM_X86_IO_APIC_H
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#define _ASM_X86_IO_APIC_H
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#include <linux/types.h>
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#include <asm/mpspec.h>
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#include <asm/apicdef.h>
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#include <asm/irq_vectors.h>
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/*
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* Intel IO-APIC support for SMP and UP systems.
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*
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* Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
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*/
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/* I/O Unit Redirection Table */
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#define IO_APIC_REDIR_VECTOR_MASK 0x000FF
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#define IO_APIC_REDIR_DEST_LOGICAL 0x00800
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#define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
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#define IO_APIC_REDIR_SEND_PENDING (1 << 12)
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#define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
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#define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
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#define IO_APIC_REDIR_MASKED (1 << 16)
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/*
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* The structure of the IO-APIC:
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*/
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union IO_APIC_reg_00 {
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u32 raw;
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struct {
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u32 __reserved_2 : 14,
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LTS : 1,
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delivery_type : 1,
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__reserved_1 : 8,
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ID : 8;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_01 {
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u32 raw;
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struct {
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u32 version : 8,
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__reserved_2 : 7,
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PRQ : 1,
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entries : 8,
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__reserved_1 : 8;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_02 {
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u32 raw;
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struct {
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u32 __reserved_2 : 24,
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arbitration : 4,
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__reserved_1 : 4;
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} __attribute__ ((packed)) bits;
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};
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union IO_APIC_reg_03 {
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u32 raw;
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struct {
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u32 boot_DT : 1,
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__reserved_1 : 31;
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} __attribute__ ((packed)) bits;
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};
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enum ioapic_irq_destination_types {
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dest_Fixed = 0,
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dest_LowestPrio = 1,
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dest_SMI = 2,
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dest__reserved_1 = 3,
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dest_NMI = 4,
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dest_INIT = 5,
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dest__reserved_2 = 6,
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dest_ExtINT = 7
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};
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struct IO_APIC_route_entry {
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__u32 vector : 8,
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delivery_mode : 3, /* 000: FIXED
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* 001: lowest prio
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* 111: ExtINT
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*/
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dest_mode : 1, /* 0: physical, 1: logical */
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delivery_status : 1,
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polarity : 1,
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irr : 1,
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trigger : 1, /* 0: edge, 1: level */
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mask : 1, /* 0: enabled, 1: disabled */
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__reserved_2 : 15;
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__u32 __reserved_3 : 24,
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dest : 8;
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} __attribute__ ((packed));
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struct IR_IO_APIC_route_entry {
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__u64 vector : 8,
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zero : 3,
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index2 : 1,
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delivery_status : 1,
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polarity : 1,
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irr : 1,
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trigger : 1,
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mask : 1,
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reserved : 31,
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format : 1,
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index : 15;
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} __attribute__ ((packed));
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#ifdef CONFIG_X86_IO_APIC
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/*
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* # of IO-APICs and # of IRQ routing registers
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*/
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extern int nr_ioapics;
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extern int nr_ioapic_registers[MAX_IO_APICS];
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/*
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* MP-BIOS irq configuration table structures:
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*/
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#define MP_MAX_IOAPIC_PIN 127
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struct mp_config_ioapic {
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unsigned long mp_apicaddr;
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unsigned int mp_apicid;
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unsigned char mp_type;
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unsigned char mp_apicver;
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unsigned char mp_flags;
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};
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struct mp_config_intsrc {
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unsigned int mp_dstapic;
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unsigned char mp_type;
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unsigned char mp_irqtype;
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unsigned short mp_irqflag;
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unsigned char mp_srcbus;
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unsigned char mp_srcbusirq;
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unsigned char mp_dstirq;
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};
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/* I/O APIC entries */
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extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
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/* # of MP IRQ source entries */
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extern int mp_irq_entries;
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/* MP IRQ source entries */
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extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
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/* non-0 if default (table-less) MP configuration */
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extern int mpc_default_type;
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/* Older SiS APIC requires we rewrite the index register */
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extern int sis_apic_bug;
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/* 1 if "noapic" boot option passed */
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extern int skip_ioapic_setup;
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/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
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extern int timer_through_8259;
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static inline void disable_ioapic_setup(void)
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{
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skip_ioapic_setup = 1;
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}
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/*
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* If we use the IO-APIC for IRQ routing, disable automatic
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* assignment of PCI IRQ's.
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*/
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#define io_apic_assign_pci_irqs \
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(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
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#ifdef CONFIG_ACPI
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extern int io_apic_get_unique_id(int ioapic, int apic_id);
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extern int io_apic_get_version(int ioapic);
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extern int io_apic_get_redir_entries(int ioapic);
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extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
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int edge_level, int active_high_low);
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#endif /* CONFIG_ACPI */
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extern int (*ioapic_renumber_irq)(int ioapic, int irq);
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extern void ioapic_init_mappings(void);
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#ifdef CONFIG_X86_64
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extern int save_mask_IO_APIC_setup(void);
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extern void restore_IO_APIC_setup(void);
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extern void reinit_intr_remapped_IO_APIC(int);
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#endif
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extern int probe_nr_irqs(void);
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#else /* !CONFIG_X86_IO_APIC */
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#define io_apic_assign_pci_irqs 0
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static const int timer_through_8259 = 0;
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static inline void ioapic_init_mappings(void) { }
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static inline int probe_nr_irqs(void)
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{
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return NR_IRQS;
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}
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#endif
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#endif /* _ASM_X86_IO_APIC_H */
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