e550e17ffe
This patch merges struct snd_soc_codec_dai and struct snd_soc_cpu_dai into struct snd_soc_dai for the codec drivers. Signed-off-by: Liam Girdwood <lg@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
103 lines
2.6 KiB
C
103 lines
2.6 KiB
C
/*
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* wm8510.h -- WM8510 Soc Audio driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _WM8510_H
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#define _WM8510_H
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/* WM8510 register space */
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#define WM8510_RESET 0x0
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#define WM8510_POWER1 0x1
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#define WM8510_POWER2 0x2
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#define WM8510_POWER3 0x3
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#define WM8510_IFACE 0x4
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#define WM8510_COMP 0x5
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#define WM8510_CLOCK 0x6
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#define WM8510_ADD 0x7
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#define WM8510_GPIO 0x8
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#define WM8510_DAC 0xa
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#define WM8510_DACVOL 0xb
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#define WM8510_ADC 0xe
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#define WM8510_ADCVOL 0xf
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#define WM8510_EQ1 0x12
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#define WM8510_EQ2 0x13
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#define WM8510_EQ3 0x14
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#define WM8510_EQ4 0x15
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#define WM8510_EQ5 0x16
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#define WM8510_DACLIM1 0x18
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#define WM8510_DACLIM2 0x19
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#define WM8510_NOTCH1 0x1b
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#define WM8510_NOTCH2 0x1c
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#define WM8510_NOTCH3 0x1d
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#define WM8510_NOTCH4 0x1e
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#define WM8510_ALC1 0x20
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#define WM8510_ALC2 0x21
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#define WM8510_ALC3 0x22
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#define WM8510_NGATE 0x23
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#define WM8510_PLLN 0x24
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#define WM8510_PLLK1 0x25
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#define WM8510_PLLK2 0x26
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#define WM8510_PLLK3 0x27
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#define WM8510_ATTEN 0x28
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#define WM8510_INPUT 0x2c
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#define WM8510_INPPGA 0x2d
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#define WM8510_ADCBOOST 0x2f
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#define WM8510_OUTPUT 0x31
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#define WM8510_SPKMIX 0x32
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#define WM8510_SPKVOL 0x36
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#define WM8510_MONOMIX 0x38
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#define WM8510_CACHEREGNUM 57
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/* Clock divider Id's */
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#define WM8510_OPCLKDIV 0
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#define WM8510_MCLKDIV 1
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#define WM8510_ADCCLK 2
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#define WM8510_DACCLK 3
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#define WM8510_BCLKDIV 4
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/* DAC clock dividers */
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#define WM8510_DACCLK_F2 (1 << 3)
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#define WM8510_DACCLK_F4 (0 << 3)
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/* ADC clock dividers */
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#define WM8510_ADCCLK_F2 (1 << 3)
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#define WM8510_ADCCLK_F4 (0 << 3)
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/* PLL Out dividers */
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#define WM8510_OPCLKDIV_1 (0 << 4)
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#define WM8510_OPCLKDIV_2 (1 << 4)
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#define WM8510_OPCLKDIV_3 (2 << 4)
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#define WM8510_OPCLKDIV_4 (3 << 4)
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/* BCLK clock dividers */
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#define WM8510_BCLKDIV_1 (0 << 2)
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#define WM8510_BCLKDIV_2 (1 << 2)
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#define WM8510_BCLKDIV_4 (2 << 2)
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#define WM8510_BCLKDIV_8 (3 << 2)
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#define WM8510_BCLKDIV_16 (4 << 2)
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#define WM8510_BCLKDIV_32 (5 << 2)
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/* MCLK clock dividers */
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#define WM8510_MCLKDIV_1 (0 << 5)
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#define WM8510_MCLKDIV_1_5 (1 << 5)
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#define WM8510_MCLKDIV_2 (2 << 5)
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#define WM8510_MCLKDIV_3 (3 << 5)
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#define WM8510_MCLKDIV_4 (4 << 5)
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#define WM8510_MCLKDIV_6 (5 << 5)
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#define WM8510_MCLKDIV_8 (6 << 5)
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#define WM8510_MCLKDIV_12 (7 << 5)
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struct wm8510_setup_data {
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unsigned short i2c_address;
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};
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extern struct snd_soc_dai wm8510_dai;
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extern struct snd_soc_codec_device soc_codec_dev_wm8510;
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#endif
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