kernel-fxtec-pro1x/arch/ia64/mm
de Dinechin, Christophe (Integrity VM) aec103bfa6 [IA64] Avoid unnecessary TLB flushes when allocating memory
Improve performance of memory allocations on ia64 by avoiding a global TLB
purge to purge a single page from the file cache. This happens whenever we
evict a page from the buffer cache to make room for some other allocation.

Test case: Run 'find /usr -type f | xargs cat > /dev/null' in the
background to fill the buffer cache, then run something that uses memory,
e.g. 'gmake -j50 install'. Instrumentation showed that the number of
global TLB purges went from a few millions down to about 170 over a 12
hours run of the above.

The performance impact is particularly noticeable under virtualization,
because a virtual TLB is generally both larger and slower to purge than
a physical one.

Signed-off-by: Christophe de Dinechin <ddd@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-12-18 16:56:50 -08:00
..
contig.c [IA64] Fix section mismatch in contig.c version of per_cpu_init() 2007-11-06 15:14:45 -08:00
discontig.c Add vmcoreinfo 2007-10-17 08:42:54 -07:00
extable.c
fault.c pid namespaces: define is_global_init() and is_container_init() 2007-10-19 11:53:37 -07:00
hugetlbpage.c Do not depend on MAX_ORDER when grouping pages by mobility 2007-10-16 09:43:00 -07:00
init.c [IA64] ia64/mm/init.c: fix section mismatches 2007-10-29 10:42:35 -07:00
ioremap.c [IA64] make ioremap avoid unsupported attributes 2007-03-30 09:37:41 -07:00
Makefile
numa.c
tlb.c [IA64] Avoid unnecessary TLB flushes when allocating memory 2007-12-18 16:56:50 -08:00