74bf4312ff
We now use the TSB hardware assist features of the UltraSPARC MMUs. SMP is currently knowingly broken, we need to find another place to store the per-cpu base pointers. We hid them away in the TSB base register, and that obviously will not work any more :-) Another known broken case is non-8KB base page size. Also noticed that flush_tlb_all() is not referenced anywhere, only the internal __flush_tlb_all() (local cpu only) is used by the sparc64 port, so we can get rid of flush_tlb_all(). The kernel gets it's own 8KB TSB (swapper_tsb) and each address space gets it's own private 8K TSB. Later we can add code to dynamically increase the size of per-process TSB as the RSS grows. An 8KB TSB is good enough for up to about a 4MB RSS, after which the TSB starts to incur many capacity and conflict misses. We even accumulate OBP translations into the kernel TSB. Another area for refinement is large page size support. We could use a secondary address space TSB to handle those. Signed-off-by: David S. Miller <davem@davemloft.net>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
#ifndef _SPARC64_TLBFLUSH_H
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#define _SPARC64_TLBFLUSH_H
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#include <linux/config.h>
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#include <linux/mm.h>
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#include <asm/mmu_context.h>
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/* TSB flush operations. */
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struct mmu_gather;
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extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
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extern void flush_tsb_user(struct mmu_gather *mp);
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/* TLB flush operations. */
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extern void flush_tlb_pending(void);
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#define flush_tlb_range(vma,start,end) \
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do { (void)(start); flush_tlb_pending(); } while (0)
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#define flush_tlb_page(vma,addr) flush_tlb_pending()
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#define flush_tlb_mm(mm) flush_tlb_pending()
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/* Local cpu only. */
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extern void __flush_tlb_all(void);
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extern void __flush_tlb_page(unsigned long context, unsigned long page, unsigned long r);
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extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
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#ifndef CONFIG_SMP
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#define flush_tlb_kernel_range(start,end) \
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do { flush_tsb_kernel_range(start,end); \
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__flush_tlb_kernel_range(start,end); \
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} while (0)
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#else /* CONFIG_SMP */
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extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
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#define flush_tlb_kernel_range(start, end) \
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do { flush_tsb_kernel_range(start,end); \
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smp_flush_tlb_kernel_range(start, end); \
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} while (0)
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#endif /* ! CONFIG_SMP */
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static inline void flush_tlb_pgtables(struct mm_struct *mm, unsigned long start, unsigned long end)
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{
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/* We don't use virtual page tables for TLB miss processing
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* any more. Nowadays we use the TSB.
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*/
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}
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#endif /* _SPARC64_TLBFLUSH_H */
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