0b57ee9e55
Introduce a Kconfig symbol SPARC that is defined on both the sparc and sparc64 architectures. This symbol makes some dependencies more readable. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: David S. Miller <davem@davemloft.net>
133 lines
2.9 KiB
C
133 lines
2.9 KiB
C
#ifndef _I8042_H
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#define _I8042_H
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#include <linux/config.h>
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/*
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* Copyright (c) 1999-2002 Vojtech Pavlik
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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/*
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* Arch-dependent inline functions and defines.
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*/
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#if defined(CONFIG_MACH_JAZZ)
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#include "i8042-jazzio.h"
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#elif defined(CONFIG_SGI_IP22)
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#include "i8042-ip22io.h"
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#elif defined(CONFIG_PPC)
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#include "i8042-ppcio.h"
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#elif defined(CONFIG_SPARC)
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#include "i8042-sparcio.h"
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#elif defined(CONFIG_X86) || defined(CONFIG_IA64)
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#include "i8042-x86ia64io.h"
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#else
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#include "i8042-io.h"
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#endif
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/*
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* This is in 50us units, the time we wait for the i8042 to react. This
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* has to be long enough for the i8042 itself to timeout on sending a byte
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* to a non-existent mouse.
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*/
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#define I8042_CTL_TIMEOUT 10000
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/*
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* When the device isn't opened and it's interrupts aren't used, we poll it at
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* regular intervals to see if any characters arrived. If yes, we can start
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* probing for any mouse / keyboard connected. This is the period of the
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* polling.
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*/
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#define I8042_POLL_PERIOD HZ/20
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/*
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* Status register bits.
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*/
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#define I8042_STR_PARITY 0x80
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#define I8042_STR_TIMEOUT 0x40
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#define I8042_STR_AUXDATA 0x20
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#define I8042_STR_KEYLOCK 0x10
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#define I8042_STR_CMDDAT 0x08
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#define I8042_STR_MUXERR 0x04
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#define I8042_STR_IBF 0x02
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#define I8042_STR_OBF 0x01
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/*
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* Control register bits.
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*/
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#define I8042_CTR_KBDINT 0x01
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#define I8042_CTR_AUXINT 0x02
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#define I8042_CTR_IGNKEYLOCK 0x08
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#define I8042_CTR_KBDDIS 0x10
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#define I8042_CTR_AUXDIS 0x20
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#define I8042_CTR_XLATE 0x40
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/*
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* Commands.
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*/
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#define I8042_CMD_CTL_RCTR 0x0120
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#define I8042_CMD_CTL_WCTR 0x1060
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#define I8042_CMD_CTL_TEST 0x01aa
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#define I8042_CMD_KBD_DISABLE 0x00ad
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#define I8042_CMD_KBD_ENABLE 0x00ae
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#define I8042_CMD_KBD_TEST 0x01ab
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#define I8042_CMD_KBD_LOOP 0x11d2
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#define I8042_CMD_AUX_DISABLE 0x00a7
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#define I8042_CMD_AUX_ENABLE 0x00a8
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#define I8042_CMD_AUX_TEST 0x01a9
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#define I8042_CMD_AUX_SEND 0x10d4
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#define I8042_CMD_AUX_LOOP 0x11d3
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#define I8042_CMD_MUX_PFX 0x0090
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#define I8042_CMD_MUX_SEND 0x1090
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/*
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* Return codes.
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*/
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#define I8042_RET_CTL_TEST 0x55
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/*
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* Expected maximum internal i8042 buffer size. This is used for flushing
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* the i8042 buffers.
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*/
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#define I8042_BUFFER_SIZE 16
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/*
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* Number of AUX ports on controllers supporting active multiplexing
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* specification
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*/
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#define I8042_NUM_MUX_PORTS 4
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/*
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* Debug.
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*/
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#ifdef DEBUG
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static unsigned long i8042_start_time;
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#define dbg_init() do { i8042_start_time = jiffies; } while (0)
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#define dbg(format, arg...) \
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do { \
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if (i8042_debug) \
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printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" , \
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## arg, (int) (jiffies - i8042_start_time)); \
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} while (0)
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#else
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#define dbg_init() do { } while (0)
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#define dbg(format, arg...) do {} while (0)
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#endif
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#endif /* _I8042_H */
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