d4b34c6c84
S5P Samsung SoCs has a EPLL to support various PLL clock sources for other H/W blocks. Until now, to control EPLL, each of SoCs make their own functions in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and 'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move these duplicated codes to common EPLL functions that use platform wide. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> |
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.. | ||
irqs.h | ||
map-s5p.h | ||
pll.h | ||
reset.h | ||
s5p-clock.h | ||
s5p6440.h | ||
s5p6442.h | ||
s5p6450.h | ||
s5pc100.h | ||
s5pv210.h | ||
s5pv310.h | ||
system-reset.h |