90303b1023
Patch from Catalin Marinas If the low interrupt latency mode is enabled for the CPU (from ARMv6 onwards), the ldm/stm instructions are no longer atomic. An ldm instruction restoring the sp and pc registers can be interrupted immediately after sp was updated but before the pc. If this happens, the CPU restores the base register to the value before the ldm instruction but if the base register is not sp, the interrupt routine will corrupt the stack and the restarted ldm instruction will load garbage. Note that future ARM cores might always run in the low interrupt latency mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
106 lines
2.3 KiB
ArmAsm
106 lines
2.3 KiB
ArmAsm
/*
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* linux/arch/arm/lib/csumpartialcopyuser.S
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*
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* Copyright (C) 1995-1998 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* 27/03/03 Ian Molton Clean up CONFIG_CPU
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*
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/errno.h>
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#include <asm/asm-offsets.h>
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.text
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.macro save_regs
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mov ip, sp
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stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc}
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sub fp, ip, #4
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.endm
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.macro load_regs
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ldmfd sp, {r1, r2, r4-r8, fp, sp, pc}
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.endm
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.macro load1b, reg1
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9999: ldrbt \reg1, [r0], $1
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.section __ex_table, "a"
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.align 3
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.long 9999b, 6001f
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.previous
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.endm
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.macro load2b, reg1, reg2
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9999: ldrbt \reg1, [r0], $1
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9998: ldrbt \reg2, [r0], $1
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.section __ex_table, "a"
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.long 9999b, 6001f
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.long 9998b, 6001f
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.previous
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.endm
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.macro load1l, reg1
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9999: ldrt \reg1, [r0], $4
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.section __ex_table, "a"
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.align 3
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.long 9999b, 6001f
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.previous
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.endm
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.macro load2l, reg1, reg2
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9999: ldrt \reg1, [r0], $4
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9998: ldrt \reg2, [r0], $4
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.section __ex_table, "a"
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.long 9999b, 6001f
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.long 9998b, 6001f
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.previous
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.endm
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.macro load4l, reg1, reg2, reg3, reg4
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9999: ldrt \reg1, [r0], $4
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9998: ldrt \reg2, [r0], $4
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9997: ldrt \reg3, [r0], $4
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9996: ldrt \reg4, [r0], $4
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.section __ex_table, "a"
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.long 9999b, 6001f
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.long 9998b, 6001f
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.long 9997b, 6001f
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.long 9996b, 6001f
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.previous
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.endm
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/*
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* unsigned int
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* csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *err_ptr)
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* r0 = src, r1 = dst, r2 = len, r3 = sum, [sp] = *err_ptr
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* Returns : r0 = checksum, [[sp, #0], #0] = 0 or -EFAULT
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*/
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#define FN_ENTRY ENTRY(csum_partial_copy_from_user)
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#include "csumpartialcopygeneric.S"
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/*
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* FIXME: minor buglet here
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* We don't return the checksum for the data present in the buffer. To do
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* so properly, we would have to add in whatever registers were loaded before
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* the fault, which, with the current asm above is not predictable.
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*/
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.section .fixup,"ax"
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.align 4
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6001: mov r4, #-EFAULT
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ldr r5, [fp, #4] @ *err_ptr
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str r4, [r5]
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ldmia sp, {r1, r2} @ retrieve dst, len
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add r2, r2, r1
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mov r0, #0 @ zero the buffer
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6002: teq r2, r1
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strneb r0, [r1], #1
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bne 6002b
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load_regs
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.previous
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