d22960c8bb
This patch adds mdio platform devices on SoCs that have the necessary hardware. Clock lookup entries (aliases) have also been added, so that the MDIO and EMAC drivers can independently enable/disable a shared underlying clock. Further, the EMAC MMR region has been split down into separate MDIO and EMAC regions. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Tested-by: Michael Williamson <michael.williamson@criticallink.com> Tested-by: Caglar Akyuz <caglarakyuz@gmail.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
95 lines
2.4 KiB
C
95 lines
2.4 KiB
C
/*
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* Chip specific defines for DM646x SoC
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*
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* Author: Kevin Hilman, Deep Root Systems, LLC
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*
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* 2007 (c) Deep Root Systems, LLC. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASM_ARCH_DM646X_H
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#define __ASM_ARCH_DM646X_H
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#include <mach/hardware.h>
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#include <mach/asp.h>
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#include <linux/i2c.h>
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#include <linux/videodev2.h>
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#include <linux/clk.h>
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#include <linux/davinci_emac.h>
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#define DM646X_EMAC_BASE (0x01C80000)
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#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
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#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
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#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000)
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#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000)
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#define DM646X_EMAC_MDIO_OFFSET (0x4000)
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#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000)
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#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
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#define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
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void __init dm646x_init(void);
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void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
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void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
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void __init dm646x_board_setup_refclk(struct clk *clk);
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int __init dm646x_init_edma(struct edma_rsv_info *rsv);
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void dm646x_video_init(void);
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enum vpif_if_type {
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VPIF_IF_BT656,
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VPIF_IF_BT1120,
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VPIF_IF_RAW_BAYER
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};
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struct vpif_interface {
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enum vpif_if_type if_type;
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unsigned hd_pol:1;
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unsigned vd_pol:1;
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unsigned fid_pol:1;
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};
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struct vpif_subdev_info {
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const char *name;
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struct i2c_board_info board_info;
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u32 input;
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u32 output;
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unsigned can_route:1;
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struct vpif_interface vpif_if;
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};
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struct vpif_display_config {
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int (*set_clock)(int, int);
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struct vpif_subdev_info *subdevinfo;
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int subdev_count;
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const char **output;
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int output_count;
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const char *card_name;
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};
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struct vpif_input {
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struct v4l2_input input;
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const char *subdev_name;
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};
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#define VPIF_CAPTURE_MAX_CHANNELS 2
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struct vpif_capture_chan_config {
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const struct vpif_input *inputs;
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int input_count;
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};
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struct vpif_capture_config {
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int (*setup_input_channel_mode)(int);
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int (*setup_input_path)(int, const char *);
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struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
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struct vpif_subdev_info *subdev_info;
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int subdev_count;
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const char *card_name;
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};
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void dm646x_setup_vpif(struct vpif_display_config *,
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struct vpif_capture_config *);
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#endif /* __ASM_ARCH_DM646X_H */
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