d076a206b2
The hclk and pclk clocks are controlled by the same register. Hence a lock is required to avoid corruption. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
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clk-audio-sync.c | ||
clk-divider.c | ||
clk-periph-gate.c | ||
clk-periph.c | ||
clk-pll-out.c | ||
clk-pll.c | ||
clk-super.c | ||
clk-tegra20.c | ||
clk-tegra30.c | ||
clk.c | ||
clk.h | ||
Makefile |