kernel-fxtec-pro1x/drivers/clk/tegra
Peter De Schrijver d076a206b2 clk: tegra: Add missing spinlock for hclk and pclk
The hclk and pclk clocks are controlled by the same register. Hence a lock is
required to avoid corruption.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-12 10:29:13 -07:00
..
clk-audio-sync.c
clk-divider.c
clk-periph-gate.c
clk-periph.c ARM: tegra: migrate to new clock code 2013-01-28 11:19:07 -07:00
clk-pll-out.c
clk-pll.c
clk-super.c clk: tegra: Implement locking for super clock 2013-02-12 10:29:12 -07:00
clk-tegra20.c clk: tegra: Add missing spinlock for hclk and pclk 2013-02-12 10:29:13 -07:00
clk-tegra30.c clk: tegra: Add missing spinlock for hclk and pclk 2013-02-12 10:29:13 -07:00
clk.c ARM: tegra: migrate to new clock code 2013-01-28 11:19:07 -07:00
clk.h clk: tegra: add clock support for Tegra30 2013-01-28 11:19:07 -07:00
Makefile clk: tegra: add clock support for Tegra30 2013-01-28 11:19:07 -07:00