cdf32eaa4e
We know that the randomisation slows down some workloads on Transmeta CPUs by quite large amounts. We think it's because the CPU needs to recode the same x86 instructions when they pop up at a different virtual address after a fork+exec. So disable randomization by default on those CPUs. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
111 lines
3 KiB
C
111 lines
3 KiB
C
#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include "cpu.h"
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static void __init init_transmeta(struct cpuinfo_x86 *c)
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{
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unsigned int cap_mask, uk, max, dummy;
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unsigned int cms_rev1, cms_rev2;
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unsigned int cpu_rev, cpu_freq, cpu_flags, new_cpu_rev;
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char cpu_info[65];
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get_model_name(c); /* Same as AMD/Cyrix */
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display_cacheinfo(c);
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/* Print CMS and CPU revision */
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max = cpuid_eax(0x80860000);
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cpu_rev = 0;
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if ( max >= 0x80860001 ) {
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cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
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if (cpu_rev != 0x02000000) {
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printk(KERN_INFO "CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
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(cpu_rev >> 24) & 0xff,
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(cpu_rev >> 16) & 0xff,
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(cpu_rev >> 8) & 0xff,
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cpu_rev & 0xff,
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cpu_freq);
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}
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}
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if ( max >= 0x80860002 ) {
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cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
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if (cpu_rev == 0x02000000) {
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printk(KERN_INFO "CPU: Processor revision %08X, %u MHz\n",
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new_cpu_rev, cpu_freq);
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}
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printk(KERN_INFO "CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
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(cms_rev1 >> 24) & 0xff,
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(cms_rev1 >> 16) & 0xff,
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(cms_rev1 >> 8) & 0xff,
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cms_rev1 & 0xff,
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cms_rev2);
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}
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if ( max >= 0x80860006 ) {
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cpuid(0x80860003,
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(void *)&cpu_info[0],
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(void *)&cpu_info[4],
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(void *)&cpu_info[8],
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(void *)&cpu_info[12]);
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cpuid(0x80860004,
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(void *)&cpu_info[16],
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(void *)&cpu_info[20],
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(void *)&cpu_info[24],
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(void *)&cpu_info[28]);
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cpuid(0x80860005,
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(void *)&cpu_info[32],
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(void *)&cpu_info[36],
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(void *)&cpu_info[40],
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(void *)&cpu_info[44]);
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cpuid(0x80860006,
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(void *)&cpu_info[48],
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(void *)&cpu_info[52],
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(void *)&cpu_info[56],
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(void *)&cpu_info[60]);
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cpu_info[64] = '\0';
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printk(KERN_INFO "CPU: %s\n", cpu_info);
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}
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/* Unhide possibly hidden capability flags */
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rdmsr(0x80860004, cap_mask, uk);
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wrmsr(0x80860004, ~0, uk);
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c->x86_capability[0] = cpuid_edx(0x00000001);
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wrmsr(0x80860004, cap_mask, uk);
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/* If we can run i686 user-space code, call us an i686 */
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#define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV)
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if ( c->x86 == 5 && (c->x86_capability[0] & USER686) == USER686 )
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c->x86 = 6;
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/* randomize_va_space slows us down enormously;
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it probably triggers retranslation of x86->native bytecode */
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randomize_va_space = 0;
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}
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static void transmeta_identify(struct cpuinfo_x86 * c)
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{
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u32 xlvl;
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generic_identify(c);
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/* Transmeta-defined flags: level 0x80860001 */
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xlvl = cpuid_eax(0x80860000);
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if ( (xlvl & 0xffff0000) == 0x80860000 ) {
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if ( xlvl >= 0x80860001 )
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c->x86_capability[2] = cpuid_edx(0x80860001);
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}
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}
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static struct cpu_dev transmeta_cpu_dev __initdata = {
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.c_vendor = "Transmeta",
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.c_ident = { "GenuineTMx86", "TransmetaCPU" },
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.c_init = init_transmeta,
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.c_identify = transmeta_identify,
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};
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int __init transmeta_init_cpu(void)
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{
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cpu_devs[X86_VENDOR_TRANSMETA] = &transmeta_cpu_dev;
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return 0;
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}
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//early_arch_initcall(transmeta_init_cpu);
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