The phy port status register has the MDI-X status bit on bit 11, not bit 3
as is currently setup in the define. This patch corrects that so the
correct bit is checked on igp PHY types.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Acked-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
cbe7a81a73