e67ae6be73
This hooks the Integrator/AP into the SoC bus when booting from device tree, by mapping the AP controller registers first, then registering the SoC device, and then populating the device tree with the SoC device as parent. Introduce some helpers in the core to provide sysfs files detailing the use of the SoC ID which will later be reused by the Integrator/CP patch for the same bus grouping. Cc: Lee Jones <lee.jones@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
73 lines
1.4 KiB
Text
73 lines
1.4 KiB
Text
/*
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* Device Tree for the ARM Integrator/AP platform
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*/
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/dts-v1/;
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/include/ "integrator.dtsi"
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/ {
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model = "ARM Integrator/AP";
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compatible = "arm,integrator-ap";
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aliases {
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arm,timer-primary = &timer2;
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arm,timer-secondary = &timer1;
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};
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chosen {
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bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
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};
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syscon {
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/* AP system controller registers */
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reg = <0x11000000 0x100>;
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};
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timer0: timer@13000000 {
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compatible = "arm,integrator-timer";
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};
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timer1: timer@13000100 {
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compatible = "arm,integrator-timer";
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};
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timer2: timer@13000200 {
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compatible = "arm,integrator-timer";
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};
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pic: pic@14000000 {
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valid-mask = <0x003fffff>;
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};
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fpga {
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/*
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* The Integator/AP predates the idea to have magic numbers
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* identifying the PrimeCell in hardware, thus we have to
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* supply these from the device tree.
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*/
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rtc: rtc@15000000 {
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compatible = "arm,pl030", "arm,primecell";
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arm,primecell-periphid = <0x00041030>;
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};
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uart0: uart@16000000 {
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compatible = "arm,pl010", "arm,primecell";
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arm,primecell-periphid = <0x00041010>;
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};
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uart1: uart@17000000 {
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compatible = "arm,pl010", "arm,primecell";
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arm,primecell-periphid = <0x00041010>;
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};
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kmi0: kmi@18000000 {
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compatible = "arm,pl050", "arm,primecell";
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arm,primecell-periphid = <0x00041050>;
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};
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kmi1: kmi@19000000 {
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compatible = "arm,pl050", "arm,primecell";
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arm,primecell-periphid = <0x00041050>;
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};
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};
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};
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