5a04242e8c
[ Upstream commit 9f8ddee1dab836ca758ca8fc555ab5a3aaa5d3fd ] Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
/*
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* intel_soc_pmic.h - Intel SoC PMIC Driver
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*
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* Copyright (C) 2012-2014 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Author: Yang, Bin <bin.yang@intel.com>
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* Author: Zhu, Lejun <lejun.zhu@linux.intel.com>
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*/
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#ifndef __INTEL_SOC_PMIC_H__
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#define __INTEL_SOC_PMIC_H__
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#include <linux/regmap.h>
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struct intel_soc_pmic {
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int irq;
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struct regmap *regmap;
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struct regmap_irq_chip_data *irq_chip_data;
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struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
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struct regmap_irq_chip_data *irq_chip_data_tmu;
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struct regmap_irq_chip_data *irq_chip_data_bcu;
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struct regmap_irq_chip_data *irq_chip_data_adc;
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struct regmap_irq_chip_data *irq_chip_data_chgr;
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struct regmap_irq_chip_data *irq_chip_data_crit;
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struct device *dev;
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};
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#endif /* __INTEL_SOC_PMIC_H__ */
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