b818a55bc4
commit 3837407c1aa1101ed5e214c7d6041e7a23335c6e upstream.
The specification says PMSWINC increments PMEVCNTR<n>_EL1 by 1
if PMEVCNTR<n>_EL0 is enabled and configured to count SW_INCR.
For PMEVCNTR<n>_EL0 to be enabled, we need both PMCNTENSET to
be set for the corresponding event counter but we also need
the PMCR.E bit to be set.
Fixes:
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.. | ||
hyp | ||
vgic | ||
aarch32.c | ||
arch_timer.c | ||
arm.c | ||
mmio.c | ||
mmu.c | ||
perf.c | ||
pmu.c | ||
psci.c | ||
trace.h |