36ac914ba2
Currently, regmap will write 1 to mask_base to mask an interrupt and write 0 to unmask it. But some chips do not have an interrupt mask register, and only have interrupt enable register. Then we should write 0 to disable interrupt and 1 to enable. So add an mask_invert flag to handle this. If it is not set, behavior is same as previous. If set it to 1, the mask value will be inverted before written to mask_base Signed-off-by: Xiaofan Tian <tianxf@marvell.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
438 lines
14 KiB
C
438 lines
14 KiB
C
#ifndef __LINUX_REGMAP_H
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#define __LINUX_REGMAP_H
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/*
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* Register map access API
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*
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* Copyright 2011 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/list.h>
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#include <linux/rbtree.h>
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struct module;
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struct device;
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struct i2c_client;
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struct spi_device;
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struct regmap;
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struct regmap_range_cfg;
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/* An enum of all the supported cache types */
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enum regcache_type {
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REGCACHE_NONE,
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REGCACHE_RBTREE,
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REGCACHE_COMPRESSED
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};
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/**
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* Default value for a register. We use an array of structs rather
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* than a simple array as many modern devices have very sparse
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* register maps.
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*
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* @reg: Register address.
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* @def: Register default value.
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*/
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struct reg_default {
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unsigned int reg;
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unsigned int def;
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};
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#ifdef CONFIG_REGMAP
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enum regmap_endian {
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/* Unspecified -> 0 -> Backwards compatible default */
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REGMAP_ENDIAN_DEFAULT = 0,
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REGMAP_ENDIAN_BIG,
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REGMAP_ENDIAN_LITTLE,
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REGMAP_ENDIAN_NATIVE,
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};
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/**
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* Configuration for the register map of a device.
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*
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* @name: Optional name of the regmap. Useful when a device has multiple
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* register regions.
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*
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* @reg_bits: Number of bits in a register address, mandatory.
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* @reg_stride: The register address stride. Valid register addresses are a
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* multiple of this value. If set to 0, a value of 1 will be
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* used.
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* @pad_bits: Number of bits of padding between register and value.
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* @val_bits: Number of bits in a register value, mandatory.
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*
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* @writeable_reg: Optional callback returning true if the register
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* can be written to.
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* @readable_reg: Optional callback returning true if the register
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* can be read from.
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* @volatile_reg: Optional callback returning true if the register
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* value can't be cached.
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* @precious_reg: Optional callback returning true if the rgister
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* should not be read outside of a call from the driver
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* (eg, a clear on read interrupt status register).
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*
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* @max_register: Optional, specifies the maximum valid register index.
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* @reg_defaults: Power on reset values for registers (for use with
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* register cache support).
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* @num_reg_defaults: Number of elements in reg_defaults.
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*
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* @read_flag_mask: Mask to be set in the top byte of the register when doing
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* a read.
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* @write_flag_mask: Mask to be set in the top byte of the register when doing
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* a write. If both read_flag_mask and write_flag_mask are
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* empty the regmap_bus default masks are used.
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* @use_single_rw: If set, converts the bulk read and write operations into
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* a series of single read and write operations. This is useful
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* for device that does not support bulk read and write.
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*
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* @cache_type: The actual cache type.
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* @reg_defaults_raw: Power on reset values for registers (for use with
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* register cache support).
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* @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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* @reg_format_endian: Endianness for formatted register addresses. If this is
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* DEFAULT, the @reg_format_endian_default value from the
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* regmap bus is used.
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* @val_format_endian: Endianness for formatted register values. If this is
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* DEFAULT, the @reg_format_endian_default value from the
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* regmap bus is used.
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*
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* @ranges: Array of configuration entries for virtual address ranges.
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* @num_ranges: Number of range configuration entries.
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*/
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struct regmap_config {
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const char *name;
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int reg_bits;
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int reg_stride;
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int pad_bits;
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int val_bits;
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bool (*writeable_reg)(struct device *dev, unsigned int reg);
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bool (*readable_reg)(struct device *dev, unsigned int reg);
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bool (*volatile_reg)(struct device *dev, unsigned int reg);
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bool (*precious_reg)(struct device *dev, unsigned int reg);
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unsigned int max_register;
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const struct reg_default *reg_defaults;
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unsigned int num_reg_defaults;
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enum regcache_type cache_type;
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const void *reg_defaults_raw;
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unsigned int num_reg_defaults_raw;
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u8 read_flag_mask;
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u8 write_flag_mask;
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bool use_single_rw;
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enum regmap_endian reg_format_endian;
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enum regmap_endian val_format_endian;
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const struct regmap_range_cfg *ranges;
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unsigned int n_ranges;
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};
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/**
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* Configuration for indirectly accessed or paged registers.
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* Registers, mapped to this virtual range, are accessed in two steps:
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* 1. page selector register update;
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* 2. access through data window registers.
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*
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* @range_min: Address of the lowest register address in virtual range.
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* @range_max: Address of the highest register in virtual range.
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*
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* @page_sel_reg: Register with selector field.
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* @page_sel_mask: Bit shift for selector value.
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* @page_sel_shift: Bit mask for selector value.
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*
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* @window_start: Address of first (lowest) register in data window.
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* @window_len: Number of registers in data window.
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*/
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struct regmap_range_cfg {
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/* Registers of virtual address range */
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unsigned int range_min;
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unsigned int range_max;
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/* Page selector for indirect addressing */
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unsigned int selector_reg;
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unsigned int selector_mask;
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int selector_shift;
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/* Data window (per each page) */
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unsigned int window_start;
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unsigned int window_len;
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};
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typedef int (*regmap_hw_write)(void *context, const void *data,
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size_t count);
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typedef int (*regmap_hw_gather_write)(void *context,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len);
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typedef int (*regmap_hw_read)(void *context,
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const void *reg_buf, size_t reg_size,
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void *val_buf, size_t val_size);
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typedef void (*regmap_hw_free_context)(void *context);
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/**
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* Description of a hardware bus for the register map infrastructure.
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*
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* @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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* to perform locking.
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* @write: Write operation.
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* @gather_write: Write operation with split register/value, return -ENOTSUPP
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* if not implemented on a given device.
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* @read: Read operation. Data is returned in the buffer used to transmit
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* data.
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* @read_flag_mask: Mask to be set in the top byte of the register when doing
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* a read.
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* @reg_format_endian_default: Default endianness for formatted register
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* addresses. Used when the regmap_config specifies DEFAULT. If this is
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* DEFAULT, BIG is assumed.
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* @val_format_endian_default: Default endianness for formatted register
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* values. Used when the regmap_config specifies DEFAULT. If this is
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* DEFAULT, BIG is assumed.
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*/
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struct regmap_bus {
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bool fast_io;
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regmap_hw_write write;
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regmap_hw_gather_write gather_write;
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regmap_hw_read read;
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regmap_hw_free_context free_context;
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u8 read_flag_mask;
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enum regmap_endian reg_format_endian_default;
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enum regmap_endian val_format_endian_default;
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};
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struct regmap *regmap_init(struct device *dev,
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const struct regmap_bus *bus,
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void *bus_context,
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const struct regmap_config *config);
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struct regmap *regmap_init_i2c(struct i2c_client *i2c,
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const struct regmap_config *config);
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struct regmap *regmap_init_spi(struct spi_device *dev,
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const struct regmap_config *config);
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struct regmap *regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init(struct device *dev,
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const struct regmap_bus *bus,
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void *bus_context,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init_spi(struct spi_device *dev,
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const struct regmap_config *config);
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struct regmap *devm_regmap_init_mmio(struct device *dev,
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void __iomem *regs,
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const struct regmap_config *config);
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void regmap_exit(struct regmap *map);
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int regmap_reinit_cache(struct regmap *map,
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const struct regmap_config *config);
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struct regmap *dev_get_regmap(struct device *dev, const char *name);
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int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
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int regmap_raw_write(struct regmap *map, unsigned int reg,
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const void *val, size_t val_len);
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int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
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size_t val_count);
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int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
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int regmap_raw_read(struct regmap *map, unsigned int reg,
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void *val, size_t val_len);
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int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
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size_t val_count);
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int regmap_update_bits(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val);
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int regmap_update_bits_check(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val,
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bool *change);
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int regmap_get_val_bytes(struct regmap *map);
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int regcache_sync(struct regmap *map);
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int regcache_sync_region(struct regmap *map, unsigned int min,
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unsigned int max);
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void regcache_cache_only(struct regmap *map, bool enable);
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void regcache_cache_bypass(struct regmap *map, bool enable);
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void regcache_mark_dirty(struct regmap *map);
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int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
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int num_regs);
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/**
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* Description of an IRQ for the generic regmap irq_chip.
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*
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* @reg_offset: Offset of the status/mask register within the bank
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* @mask: Mask used to flag/control the register.
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*/
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struct regmap_irq {
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unsigned int reg_offset;
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unsigned int mask;
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};
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/**
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* Description of a generic regmap irq_chip. This is not intended to
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* handle every possible interrupt controller, but it should handle a
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* substantial proportion of those that are found in the wild.
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*
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* @name: Descriptive name for IRQ controller.
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*
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* @status_base: Base status register address.
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* @mask_base: Base mask register address.
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* @wake_base: Base address for wake enables. If zero unsupported.
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* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
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* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
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*
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* @num_regs: Number of registers in each control bank.
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* @irqs: Descriptors for individual IRQs. Interrupt numbers are
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* assigned based on the index in the array of the interrupt.
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* @num_irqs: Number of descriptors.
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*/
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struct regmap_irq_chip {
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const char *name;
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unsigned int status_base;
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unsigned int mask_base;
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unsigned int ack_base;
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unsigned int wake_base;
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unsigned int irq_reg_stride;
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unsigned int mask_invert;
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bool runtime_pm;
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int num_regs;
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const struct regmap_irq *irqs;
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int num_irqs;
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};
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struct regmap_irq_chip_data;
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int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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int irq_base, const struct regmap_irq_chip *chip,
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struct regmap_irq_chip_data **data);
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void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
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int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
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int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
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#else
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/*
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* These stubs should only ever be called by generic code which has
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* regmap based facilities, if they ever get called at runtime
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* something is going wrong and something probably needs to select
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* REGMAP.
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*/
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static inline int regmap_write(struct regmap *map, unsigned int reg,
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unsigned int val)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
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const void *val, size_t val_len)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
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const void *val, size_t val_count)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_read(struct regmap *map, unsigned int reg,
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unsigned int *val)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
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void *val, size_t val_len)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
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void *val, size_t val_count)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_update_bits_check(struct regmap *map,
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unsigned int reg,
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unsigned int mask, unsigned int val,
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bool *change)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regmap_get_val_bytes(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regcache_sync(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline int regcache_sync_region(struct regmap *map, unsigned int min,
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unsigned int max)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline void regcache_cache_only(struct regmap *map, bool enable)
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{
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WARN_ONCE(1, "regmap API is disabled");
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}
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static inline void regcache_cache_bypass(struct regmap *map, bool enable)
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{
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WARN_ONCE(1, "regmap API is disabled");
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}
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static inline void regcache_mark_dirty(struct regmap *map)
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{
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WARN_ONCE(1, "regmap API is disabled");
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}
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static inline int regmap_register_patch(struct regmap *map,
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const struct reg_default *regs,
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int num_regs)
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{
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WARN_ONCE(1, "regmap API is disabled");
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return -EINVAL;
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}
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static inline struct regmap *dev_get_regmap(struct device *dev,
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const char *name)
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{
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return NULL;
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}
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#endif
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#endif
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