21f47fbc5b
This adds support for the family of Systems-on-Chip produced initially by VIA and now its subsidiary WonderMedia that have recently become widespread in lower-end Chinese ARM-based tablets and netbooks. Support is included for both VT8500 and WM8505, selectable by a configuration switch at kernel build time. Included are basic machine initialization files, register and interrupt definitions, support for the on-chip interrupt controller, high-precision OS timer, GPIO lines, necessary macros for early debug, pulse-width-modulated outputs control, as well as platform device configurations for the specific drivers implemented elsewhere. Signed-off-by: Alexey Charkov <alchark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
99 lines
2.9 KiB
C
99 lines
2.9 KiB
C
/* linux/arch/arm/mach-vt8500/devices-wm8505.c
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*
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* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/platform_device.h>
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#include <mach/wm8505_regs.h>
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#include <mach/wm8505_irqs.h>
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#include <mach/i8042.h>
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#include "devices.h"
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void __init wm8505_set_resources(void)
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{
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struct resource tmp[3];
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tmp[0] = wmt_mmio_res(WM8505_GOVR_BASE, SZ_512);
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wmt_res_add(&vt8500_device_wm8505_fb, tmp, 1);
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tmp[0] = wmt_mmio_res(WM8505_UART0_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART0);
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wmt_res_add(&vt8500_device_uart0, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_UART1_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART1);
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wmt_res_add(&vt8500_device_uart1, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_UART2_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART2);
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wmt_res_add(&vt8500_device_uart2, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_UART3_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART3);
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wmt_res_add(&vt8500_device_uart3, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_UART4_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART4);
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wmt_res_add(&vt8500_device_uart4, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_UART5_BASE, 0x1040);
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tmp[1] = wmt_irq_res(IRQ_UART5);
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wmt_res_add(&vt8500_device_uart5, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_EHCI_BASE, SZ_512);
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tmp[1] = wmt_irq_res(IRQ_EHCI);
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wmt_res_add(&vt8500_device_ehci, tmp, 2);
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tmp[0] = wmt_mmio_res(WM8505_GEGEA_BASE, SZ_256);
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wmt_res_add(&vt8500_device_ge_rops, tmp, 1);
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tmp[0] = wmt_mmio_res(WM8505_PWM_BASE, 0x44);
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wmt_res_add(&vt8500_device_pwm, tmp, 1);
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tmp[0] = wmt_mmio_res(WM8505_RTC_BASE, 0x2c);
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tmp[1] = wmt_irq_res(IRQ_RTC);
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tmp[2] = wmt_irq_res(IRQ_RTCSM);
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wmt_res_add(&vt8500_device_rtc, tmp, 3);
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}
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static void __init wm8505_set_externs(void)
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{
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/* Non-resource-aware stuff */
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wmt_ic_base = WM8505_IC_BASE;
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wmt_sic_base = WM8505_SIC_BASE;
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wmt_gpio_base = WM8505_GPIO_BASE;
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wmt_pmc_base = WM8505_PMC_BASE;
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wmt_i8042_base = WM8505_PS2_BASE;
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wmt_nr_irqs = WM8505_NR_IRQS;
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wmt_timer_irq = IRQ_PMCOS0;
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wmt_gpio_ext_irq[0] = IRQ_EXT0;
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wmt_gpio_ext_irq[1] = IRQ_EXT1;
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wmt_gpio_ext_irq[2] = IRQ_EXT2;
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wmt_gpio_ext_irq[3] = IRQ_EXT3;
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wmt_gpio_ext_irq[4] = IRQ_EXT4;
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wmt_gpio_ext_irq[5] = IRQ_EXT5;
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wmt_gpio_ext_irq[6] = IRQ_EXT6;
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wmt_gpio_ext_irq[7] = IRQ_EXT7;
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wmt_i8042_kbd_irq = IRQ_PS2KBD;
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wmt_i8042_aux_irq = IRQ_PS2MOUSE;
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}
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void __init wm8505_map_io(void)
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{
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iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc));
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/* Should be done before interrupts and timers are initialized */
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wm8505_set_externs();
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}
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