Rob Clark 14cb42ed87 drm/msm/adreno: fix updating ring fence ... [ Upstream commit f228af11dfa1d1616bc67f3a4119ab77c36181f1 ] We need to set it to the most recent completed fence, not the most recent submitted. Otherwise we have races where we think we can retire submits that the GPU is not finished with, if the GPU doesn't manage to overwrite the seqno before we look at it. This can show up with hang recovery if one of the submits after the crashing submit also hangs after it is replayed. Fixes: f97decac5f ("drm/msm: Support multiple ringbuffers") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2020-09-03 11:24:23 +02:00
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drm	drm/msm/adreno: fix updating ring fence	2020-09-03 11:24:23 +02:00
host1x	gpu: host1x: debug: Fix multiple channels emitting messages simultaneously	2020-08-19 08:14:52 +02:00
ipu-v3	gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers	2020-08-21 11:05:35 +02:00
vga
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