20906ecea2
It now uses the new CPM binding and the generic pin/clock functions, and has assorted fixes and cleanup. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
53 lines
1.7 KiB
C
53 lines
1.7 KiB
C
/*
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* A collection of structures, addresses, and values associated with
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* the Freescale MPC885ADS board.
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* Copied from the FADS stuff.
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* 2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is licensed
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* "as is" without any warranty of any kind, whether express or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_MPC885ADS_H__
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#define __ASM_MPC885ADS_H__
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#include <sysdev/fsl_soc.h>
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#define MPC8xx_CPM_OFFSET (0x9c0)
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#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
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#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
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/* Bits of interest in the BCSRs.
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*/
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#define BCSR1_ETHEN ((uint)0x20000000)
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#define BCSR1_IRDAEN ((uint)0x10000000)
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#define BCSR1_RS232EN_1 ((uint)0x01000000)
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#define BCSR1_PCCEN ((uint)0x00800000)
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#define BCSR1_PCCVCC0 ((uint)0x00400000)
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#define BCSR1_PCCVPP0 ((uint)0x00200000)
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#define BCSR1_PCCVPP1 ((uint)0x00100000)
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#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
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#define BCSR1_RS232EN_2 ((uint)0x00040000)
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#define BCSR1_PCCVCC1 ((uint)0x00010000)
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#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
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#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/
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#define BCSR4_USB_LO_SPD ((uint)0x04000000)
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#define BCSR4_USB_VCC ((uint)0x02000000)
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#define BCSR4_USB_FULL_SPD ((uint)0x00040000)
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#define BCSR4_USB_EN ((uint)0x00020000)
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#define BCSR5_MII2_EN 0x40
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#define BCSR5_MII2_RST 0x20
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#define BCSR5_T1_RST 0x10
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#define BCSR5_ATM155_RST 0x08
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#define BCSR5_ATM25_RST 0x04
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#define BCSR5_MII1_EN 0x02
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#define BCSR5_MII1_RST 0x01
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#endif /* __ASM_MPC885ADS_H__ */
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#endif /* __KERNEL__ */
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