acec0ac0a8
ARM already had a case for MAP_FIXED in arch_get_unmapped_area() though it was not called before. Fix the comment to reflect that it will now be called. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
137 lines
3.2 KiB
C
137 lines
3.2 KiB
C
/*
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* linux/arch/arm/mm/mmap.c
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*/
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/mman.h>
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#include <linux/shm.h>
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#include <asm/system.h>
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#define COLOUR_ALIGN(addr,pgoff) \
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((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
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(((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
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/*
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* We need to ensure that shared mappings are correctly aligned to
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* avoid aliasing issues with VIPT caches. We need to ensure that
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* a specific page of an object is always mapped at a multiple of
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* SHMLBA bytes.
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*
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* We unconditionally provide this function for all cases, however
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* in the VIVT case, we optimise out the alignment rules.
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*/
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unsigned long
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arch_get_unmapped_area(struct file *filp, unsigned long addr,
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unsigned long len, unsigned long pgoff, unsigned long flags)
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{
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struct mm_struct *mm = current->mm;
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struct vm_area_struct *vma;
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unsigned long start_addr;
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#ifdef CONFIG_CPU_V6
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unsigned int cache_type;
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int do_align = 0, aliasing = 0;
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/*
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* We only need to do colour alignment if either the I or D
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* caches alias. This is indicated by bits 9 and 21 of the
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* cache type register.
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*/
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cache_type = read_cpuid(CPUID_CACHETYPE);
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if (cache_type != read_cpuid(CPUID_ID)) {
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aliasing = (cache_type | cache_type >> 12) & (1 << 11);
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if (aliasing)
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do_align = filp || flags & MAP_SHARED;
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}
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#else
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#define do_align 0
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#define aliasing 0
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#endif
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/*
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* We enforce the MAP_FIXED case.
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*/
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if (flags & MAP_FIXED) {
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if (aliasing && flags & MAP_SHARED && addr & (SHMLBA - 1))
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return -EINVAL;
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return addr;
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}
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if (len > TASK_SIZE)
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return -ENOMEM;
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if (addr) {
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if (do_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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else
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addr = PAGE_ALIGN(addr);
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vma = find_vma(mm, addr);
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if (TASK_SIZE - len >= addr &&
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(!vma || addr + len <= vma->vm_start))
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return addr;
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}
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if (len > mm->cached_hole_size) {
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start_addr = addr = mm->free_area_cache;
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} else {
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start_addr = addr = TASK_UNMAPPED_BASE;
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mm->cached_hole_size = 0;
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}
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full_search:
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if (do_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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else
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addr = PAGE_ALIGN(addr);
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for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
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/* At this point: (!vma || addr < vma->vm_end). */
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if (TASK_SIZE - len < addr) {
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/*
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* Start a new search - just in case we missed
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* some holes.
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*/
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if (start_addr != TASK_UNMAPPED_BASE) {
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start_addr = addr = TASK_UNMAPPED_BASE;
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mm->cached_hole_size = 0;
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goto full_search;
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}
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return -ENOMEM;
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}
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if (!vma || addr + len <= vma->vm_start) {
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/*
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* Remember the place where we stopped the search:
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*/
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mm->free_area_cache = addr + len;
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return addr;
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}
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if (addr + mm->cached_hole_size < vma->vm_start)
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mm->cached_hole_size = vma->vm_start - addr;
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addr = vma->vm_end;
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if (do_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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}
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}
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/*
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* You really shouldn't be using read() or write() on /dev/mem. This
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* might go away in the future.
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*/
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int valid_phys_addr_range(unsigned long addr, size_t size)
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{
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if (addr + size > __pa(high_memory))
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return 0;
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return 1;
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}
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/*
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* We don't use supersection mappings for mmap() on /dev/mem, which
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* means that we can't map the memory area above the 4G barrier into
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* userspace.
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*/
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int valid_mmap_phys_addr_range(unsigned long pfn, size_t size)
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{
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return !(pfn + (size >> PAGE_SHIFT) > 0x00100000);
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}
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