60571f98d2
Conflicts: arch/arm/mach-exynos/dma.c arch/arm/mach-s5p64x0/dma.c arch/arm/mach-s5pc100/dma.c arch/arm/mach-s5pv210/dma.c
130 lines
3 KiB
C
130 lines
3 KiB
C
/* linux/arch/arm/mach-s5p64x0/dma.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl330.h>
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#include <asm/irq.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <mach/regs-clock.h>
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#include <mach/dma.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/irqs.h>
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static u64 dma_dmamask = DMA_BIT_MASK(32);
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static u8 s5p6440_pdma_peri[] = {
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_MAX,
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DMACH_MAX,
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DMACH_PCM0_TX,
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DMACH_PCM0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI0_RX,
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DMACH_MAX,
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DMACH_MAX,
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DMACH_MAX,
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DMACH_MAX,
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DMACH_SPI1_TX,
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DMACH_SPI1_RX,
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};
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static struct dma_pl330_platdata s5p6440_pdma_pdata = {
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.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
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.peri_id = s5p6440_pdma_peri,
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};
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static u8 s5p6450_pdma_peri[] = {
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_UART4_RX,
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DMACH_UART4_TX,
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DMACH_PCM0_TX,
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DMACH_PCM0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI0_RX,
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DMACH_PCM1_TX,
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DMACH_PCM1_RX,
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DMACH_PCM2_TX,
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DMACH_PCM2_RX,
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DMACH_SPI1_TX,
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DMACH_SPI1_RX,
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DMACH_USI_TX,
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DMACH_USI_RX,
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DMACH_MAX,
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DMACH_I2S1_TX,
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DMACH_I2S1_RX,
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DMACH_I2S2_TX,
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DMACH_I2S2_RX,
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DMACH_PWM,
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DMACH_UART5_RX,
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DMACH_UART5_TX,
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};
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static struct dma_pl330_platdata s5p6450_pdma_pdata = {
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.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
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.peri_id = s5p6450_pdma_peri,
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};
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static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330,
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S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL);
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static int __init s5p64x0_dma_init(void)
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{
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if (soc_is_s5p6450()) {
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dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
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s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
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} else {
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dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
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s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
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}
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amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
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return 0;
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}
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arch_initcall(s5p64x0_dma_init);
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