cbf27660e6
The OMAP4 L3 interconnect is split in 3 part for power saving reason. Because of that there is no l3_main like on OMAP2 & 3 but 3 differentes l3_main_X instances. In the case of OMAP4, query only the l3_main_1 part. The clock and voltage are shared across the 3 instances. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
147 lines
3.1 KiB
C
147 lines
3.1 KiB
C
/*
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* pm.c - Common OMAP2+ power management-related code
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <plat/omap-pm.h>
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#include <plat/omap_device.h>
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#include <plat/common.h>
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#include <plat/powerdomain.h>
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#include <plat/clockdomain.h>
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static struct omap_device_pm_latency *pm_lats;
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static struct device *mpu_dev;
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static struct device *iva_dev;
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static struct device *l3_dev;
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static struct device *dsp_dev;
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struct device *omap2_get_mpuss_device(void)
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{
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WARN_ON_ONCE(!mpu_dev);
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return mpu_dev;
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}
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struct device *omap2_get_iva_device(void)
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{
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WARN_ON_ONCE(!iva_dev);
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return iva_dev;
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}
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struct device *omap2_get_l3_device(void)
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{
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WARN_ON_ONCE(!l3_dev);
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return l3_dev;
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}
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struct device *omap4_get_dsp_device(void)
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{
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WARN_ON_ONCE(!dsp_dev);
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return dsp_dev;
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}
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EXPORT_SYMBOL(omap4_get_dsp_device);
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/* static int _init_omap_device(struct omap_hwmod *oh, void *user) */
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static int _init_omap_device(char *name, struct device **new_dev)
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{
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struct omap_hwmod *oh;
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struct omap_device *od;
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oh = omap_hwmod_lookup(name);
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if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
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__func__, name))
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return -ENODEV;
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od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
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if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n",
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__func__, name))
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return -ENODEV;
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*new_dev = &od->pdev.dev;
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return 0;
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}
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/*
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* Build omap_devices for processors and bus.
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*/
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static void omap2_init_processor_devices(void)
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{
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_init_omap_device("mpu", &mpu_dev);
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_init_omap_device("iva", &iva_dev);
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if (cpu_is_omap44xx()) {
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_init_omap_device("l3_main_1", &l3_dev);
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_init_omap_device("dsp", &dsp_dev);
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} else {
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_init_omap_device("l3_main", &l3_dev);
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}
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}
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/*
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* This sets pwrdm state (other than mpu & core. Currently only ON &
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* RET are supported. Function is assuming that clkdm doesn't have
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* hw_sup mode enabled.
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*/
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int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
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{
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u32 cur_state;
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int sleep_switch = 0;
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int ret = 0;
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if (pwrdm == NULL || IS_ERR(pwrdm))
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return -EINVAL;
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while (!(pwrdm->pwrsts & (1 << state))) {
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if (state == PWRDM_POWER_OFF)
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return ret;
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state--;
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}
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cur_state = pwrdm_read_next_pwrst(pwrdm);
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if (cur_state == state)
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return ret;
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if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
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omap2_clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
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sleep_switch = 1;
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pwrdm_wait_transition(pwrdm);
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}
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ret = pwrdm_set_next_pwrst(pwrdm, state);
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if (ret) {
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printk(KERN_ERR "Unable to set state of powerdomain: %s\n",
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pwrdm->name);
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goto err;
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}
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if (sleep_switch) {
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omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
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pwrdm_wait_transition(pwrdm);
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pwrdm_state_switch(pwrdm);
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}
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err:
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return ret;
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}
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static int __init omap2_common_pm_init(void)
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{
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omap2_init_processor_devices();
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omap_pm_if_init();
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return 0;
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}
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device_initcall(omap2_common_pm_init);
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