11b897cf84
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus area. Currently, addresses at the far end of the 32bit area are assumed to belong to the PCMCIA area and fixed up to the real 36bit address before being passed to ioremap(). A previous commit enabled 64 bit physical size for the resource datatype on Alchemy and this allows to use the correct 36bit addresses when registering the PCMCIA sockets. This patch removes the 32-to-36bit address fixup and registers the Alchemy demo board pcmcia socket with the correct 36bit physical addresses. Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet card. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/994/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
137 lines
3.4 KiB
C
137 lines
3.4 KiB
C
/*
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* Alchemy Semi Au1000 pcmcia driver include file
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#ifndef __ASM_AU1000_PCMCIA_H
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#define __ASM_AU1000_PCMCIA_H
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/* include the world */
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/cistpl.h>
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#include "cs_internal.h"
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#define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
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#define AU1000_PCMCIA_IO_SPEED (255)
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#define AU1000_PCMCIA_MEM_SPEED (300)
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#define AU1X_SOCK0_IO 0xF00000000ULL
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#define AU1X_SOCK0_PHYS_ATTR 0xF40000000ULL
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#define AU1X_SOCK0_PHYS_MEM 0xF80000000ULL
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/* pcmcia socket 1 needs external glue logic so the memory map
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* differs from board to board.
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*/
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#if defined(CONFIG_MIPS_PB1000)
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#define AU1X_SOCK1_IO 0xF08000000ULL
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#define AU1X_SOCK1_PHYS_ATTR 0xF48000000ULL
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#define AU1X_SOCK1_PHYS_MEM 0xF88000000ULL
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#endif
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struct pcmcia_state {
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unsigned detect: 1,
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ready: 1,
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wrprot: 1,
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bvd1: 1,
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bvd2: 1,
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vs_3v: 1,
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vs_Xv: 1;
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};
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struct pcmcia_configure {
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unsigned sock: 8,
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vcc: 8,
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vpp: 8,
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output: 1,
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speaker: 1,
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reset: 1;
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};
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struct pcmcia_irqs {
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int sock;
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int irq;
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const char *str;
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};
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struct au1000_pcmcia_socket {
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struct pcmcia_socket socket;
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/*
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* Info from low level handler
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*/
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struct device *dev;
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unsigned int nr;
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unsigned int irq;
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/*
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* Core PCMCIA state
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*/
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struct pcmcia_low_level *ops;
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unsigned int status;
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socket_state_t cs_state;
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unsigned short spd_io[MAX_IO_WIN];
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unsigned short spd_mem[MAX_WIN];
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unsigned short spd_attr[MAX_WIN];
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struct resource res_skt;
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struct resource res_io;
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struct resource res_mem;
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struct resource res_attr;
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void * virt_io;
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unsigned int phys_io;
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unsigned int phys_attr;
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unsigned int phys_mem;
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unsigned short speed_io, speed_attr, speed_mem;
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unsigned int irq_state;
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struct timer_list poll_timer;
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};
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struct pcmcia_low_level {
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struct module *owner;
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int (*hw_init)(struct au1000_pcmcia_socket *);
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void (*hw_shutdown)(struct au1000_pcmcia_socket *);
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void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *);
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int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *);
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/*
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* Enable card status IRQs on (re-)initialisation. This can
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* be called at initialisation, power management event, or
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* pcmcia event.
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*/
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void (*socket_init)(struct au1000_pcmcia_socket *);
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/*
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* Disable card status IRQs and PCMCIA bus on suspend.
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*/
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void (*socket_suspend)(struct au1000_pcmcia_socket *);
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};
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extern int au1x_board_init(struct device *dev);
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#endif /* __ASM_AU1000_PCMCIA_H */
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