01af9507ff
The P2020 is a dual e500v2 core based SOC with: * 3 PCIe controllers * 2 General purpose DMA controllers * 2 sRIO controllers * 3 eTSECS * USB 2.0 * SDHC * SPI, I2C, DUART * enhanced localbus * and optional Security (P2020E) security w/XOR acceleration The p2020 DS reference board is pretty similar to the existing MPC85xx DS boards and has a ULI 1575 connected on one of the PCIe controllers. Signed-off-by: Ted Peters <Ted.Peters@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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| .. | ||
| Kconfig | ||
| ksi8560.c | ||
| Makefile | ||
| mpc85xx_ads.c | ||
| mpc85xx_cds.c | ||
| mpc85xx_ds.c | ||
| mpc85xx_mds.c | ||
| mpc8536_ds.c | ||
| sbc8548.c | ||
| sbc8560.c | ||
| smp.c | ||
| socrates.c | ||
| socrates_fpga_pic.c | ||
| socrates_fpga_pic.h | ||
| stx_gp3.c | ||
| tqm85xx.c | ||