bb3cee2b35
This adds core support for the ST-Ericsson U300 series platforms: U300, U330, U335 and U365. Supports memory mappings, interrupt controller, system timer (clocksource and clockevents), and binds to the existing drivers for the PrimeCells used in this design: PL190 (VIC), PL180 (MMC/SD host) and PL011 (UART). This is intented to serve as starting point for our mainling work, more patches to follow. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
649 lines
14 KiB
C
649 lines
14 KiB
C
/*
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*
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* arch/arm/mach-u300/core.c
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*
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*
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* Copyright (C) 2007-2009 ST-Ericsson AB
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* License terms: GNU General Public License (GPL) version 2
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* Core platform support, IRQ handling and device definitions.
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* Author: Linus Walleij <linus.walleij@stericsson.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/mm.h>
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#include <linux/termios.h>
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#include <linux/amba/bus.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/hardware/vic.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/syscon.h>
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#include "clock.h"
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#include "mmc.h"
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/*
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* Static I/O mappings that are needed for booting the U300 platforms. The
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* only things we need are the areas where we find the timer, syscon and
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* intcon, since the remaining device drivers will map their own memory
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* physical to virtual as the need arise.
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*/
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static struct map_desc u300_io_desc[] __initdata = {
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{
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.virtual = U300_SLOW_PER_VIRT_BASE,
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.pfn = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
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.length = SZ_64K,
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.type = MT_DEVICE,
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},
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{
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.virtual = U300_AHB_PER_VIRT_BASE,
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.pfn = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
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.length = SZ_32K,
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.type = MT_DEVICE,
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},
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{
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.virtual = U300_FAST_PER_VIRT_BASE,
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.pfn = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
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.length = SZ_32K,
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.type = MT_DEVICE,
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},
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{
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.virtual = 0xffff2000, /* TCM memory */
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.pfn = __phys_to_pfn(0xffff2000),
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.length = SZ_16K,
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.type = MT_DEVICE,
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},
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/*
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* This overlaps with the IRQ vectors etc at 0xffff0000, so these
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* may have to be moved to 0x00000000 in order to use the ROM.
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*/
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/*
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{
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.virtual = U300_BOOTROM_VIRT_BASE,
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.pfn = __phys_to_pfn(U300_BOOTROM_PHYS_BASE),
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.length = SZ_64K,
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.type = MT_ROM,
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},
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*/
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};
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void __init u300_map_io(void)
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{
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iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
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}
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/*
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* Declaration of devices found on the U300 board and
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* their respective memory locations.
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*/
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static struct amba_device uart0_device = {
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.dev = {
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.init_name = "uart0", /* Slow device at 0x3000 offset */
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.platform_data = NULL,
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},
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.res = {
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.start = U300_UART0_BASE,
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.end = U300_UART0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_U300_UART0, NO_IRQ },
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};
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/* The U335 have an additional UART1 on the APP CPU */
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#ifdef CONFIG_MACH_U300_BS335
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static struct amba_device uart1_device = {
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.dev = {
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.init_name = "uart1", /* Fast device at 0x7000 offset */
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.platform_data = NULL,
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},
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.res = {
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.start = U300_UART1_BASE,
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.end = U300_UART1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_U300_UART1, NO_IRQ },
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};
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#endif
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static struct amba_device pl172_device = {
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.dev = {
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.init_name = "pl172", /* AHB device at 0x4000 offset */
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.platform_data = NULL,
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},
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.res = {
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.start = U300_EMIF_CFG_BASE,
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.end = U300_EMIF_CFG_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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/*
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* Everything within this next ifdef deals with external devices connected to
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* the APP SPI bus.
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*/
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static struct amba_device pl022_device = {
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.dev = {
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.coherent_dma_mask = ~0,
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.init_name = "pl022", /* Fast device at 0x6000 offset */
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},
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.res = {
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.start = U300_SPI_BASE,
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.end = U300_SPI_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_U300_SPI, NO_IRQ },
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/*
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* This device has a DMA channel but the Linux driver does not use
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* it currently.
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*/
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};
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static struct amba_device mmcsd_device = {
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.dev = {
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.init_name = "mmci", /* Fast device at 0x1000 offset */
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.platform_data = NULL, /* Added later */
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},
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.res = {
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.start = U300_MMCSD_BASE,
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.end = U300_MMCSD_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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.irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
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/*
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* This device has a DMA channel but the Linux driver does not use
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* it currently.
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*/
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};
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/*
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* The order of device declaration may be important, since some devices
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* have dependencies on other devices being initialized first.
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*/
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static struct amba_device *amba_devs[] __initdata = {
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&uart0_device,
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#ifdef CONFIG_MACH_U300_BS335
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&uart1_device,
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#endif
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&pl022_device,
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&pl172_device,
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&mmcsd_device,
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};
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/* Here follows a list of all hw resources that the platform devices
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* allocate. Note, clock dependencies are not included
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*/
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static struct resource gpio_resources[] = {
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{
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.start = U300_GPIO_BASE,
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.end = (U300_GPIO_BASE + SZ_4K - 1),
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "gpio0",
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.start = IRQ_U300_GPIO_PORT0,
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.end = IRQ_U300_GPIO_PORT0,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "gpio1",
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.start = IRQ_U300_GPIO_PORT1,
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.end = IRQ_U300_GPIO_PORT1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "gpio2",
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.start = IRQ_U300_GPIO_PORT2,
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.end = IRQ_U300_GPIO_PORT2,
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.flags = IORESOURCE_IRQ,
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},
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#ifdef U300_COH901571_3
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{
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.name = "gpio3",
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.start = IRQ_U300_GPIO_PORT3,
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.end = IRQ_U300_GPIO_PORT3,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "gpio4",
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.start = IRQ_U300_GPIO_PORT4,
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.end = IRQ_U300_GPIO_PORT4,
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.flags = IORESOURCE_IRQ,
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},
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#ifdef CONFIG_MACH_U300_BS335
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{
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.name = "gpio5",
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.start = IRQ_U300_GPIO_PORT5,
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.end = IRQ_U300_GPIO_PORT5,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "gpio6",
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.start = IRQ_U300_GPIO_PORT6,
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.end = IRQ_U300_GPIO_PORT6,
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.flags = IORESOURCE_IRQ,
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},
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#endif /* CONFIG_MACH_U300_BS335 */
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#endif /* U300_COH901571_3 */
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};
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static struct resource keypad_resources[] = {
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{
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.start = U300_KEYPAD_BASE,
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.end = U300_KEYPAD_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "coh901461-press",
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.start = IRQ_U300_KEYPAD_KEYBF,
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.end = IRQ_U300_KEYPAD_KEYBF,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "coh901461-release",
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.start = IRQ_U300_KEYPAD_KEYBR,
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.end = IRQ_U300_KEYPAD_KEYBR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource rtc_resources[] = {
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{
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.start = U300_RTC_BASE,
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.end = U300_RTC_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_U300_RTC,
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.end = IRQ_U300_RTC,
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.flags = IORESOURCE_IRQ,
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},
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};
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/*
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* Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
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* but these are not yet used by the driver.
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*/
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static struct resource fsmc_resources[] = {
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{
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.start = U300_NAND_IF_PHYS_BASE,
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.end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource i2c0_resources[] = {
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{
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.start = U300_I2C0_BASE,
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.end = U300_I2C0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_U300_I2C0,
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.end = IRQ_U300_I2C0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource i2c1_resources[] = {
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{
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.start = U300_I2C1_BASE,
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.end = U300_I2C1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_U300_I2C1,
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.end = IRQ_U300_I2C1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource wdog_resources[] = {
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{
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.start = U300_WDOG_BASE,
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.end = U300_WDOG_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_U300_WDOG,
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.end = IRQ_U300_WDOG,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* TODO: These should be protected by suitable #ifdef's */
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static struct resource ave_resources[] = {
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{
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.name = "AVE3e I/O Area",
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.start = U300_VIDEOENC_BASE,
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.end = U300_VIDEOENC_BASE + SZ_512K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "AVE3e IRQ0",
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.start = IRQ_U300_VIDEO_ENC_0,
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.end = IRQ_U300_VIDEO_ENC_0,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "AVE3e IRQ1",
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.start = IRQ_U300_VIDEO_ENC_1,
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.end = IRQ_U300_VIDEO_ENC_1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "AVE3e Physmem Area",
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.start = 0, /* 0 will be remapped to reserved memory */
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.end = SZ_1M - 1,
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.flags = IORESOURCE_MEM,
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},
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/*
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* The AVE3e requires two regions of 256MB that it considers
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* "invisible". The hardware will not be able to access these
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* adresses, so they should never point to system RAM.
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*/
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{
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.name = "AVE3e Reserved 0",
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.start = 0xd0000000,
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.end = 0xd0000000 + SZ_256M - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "AVE3e Reserved 1",
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.start = 0xe0000000,
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.end = 0xe0000000 + SZ_256M - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device wdog_device = {
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.name = "wdog",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdog_resources),
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.resource = wdog_resources,
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};
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static struct platform_device i2c0_device = {
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.name = "stddci2c",
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.id = 0,
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.num_resources = ARRAY_SIZE(i2c0_resources),
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.resource = i2c0_resources,
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};
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static struct platform_device i2c1_device = {
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.name = "stddci2c",
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.id = 1,
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.num_resources = ARRAY_SIZE(i2c1_resources),
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.resource = i2c1_resources,
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};
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static struct platform_device gpio_device = {
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.name = "u300-gpio",
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.id = -1,
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.num_resources = ARRAY_SIZE(gpio_resources),
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.resource = gpio_resources,
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};
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static struct platform_device keypad_device = {
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.name = "keypad",
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.id = -1,
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.num_resources = ARRAY_SIZE(keypad_resources),
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.resource = keypad_resources,
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};
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static struct platform_device rtc_device = {
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.name = "rtc0",
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.id = -1,
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.num_resources = ARRAY_SIZE(rtc_resources),
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.resource = rtc_resources,
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};
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static struct platform_device fsmc_device = {
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.name = "nandif",
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.id = -1,
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.num_resources = ARRAY_SIZE(fsmc_resources),
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.resource = fsmc_resources,
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};
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static struct platform_device ave_device = {
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.name = "video_enc",
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.id = -1,
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.num_resources = ARRAY_SIZE(ave_resources),
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.resource = ave_resources,
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};
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/*
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* Notice that AMBA devices are initialized before platform devices.
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*
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*/
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static struct platform_device *platform_devs[] __initdata = {
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&i2c0_device,
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&i2c1_device,
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&keypad_device,
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&rtc_device,
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&gpio_device,
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&fsmc_device,
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&wdog_device,
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&ave_device
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};
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/*
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* Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
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* together so some interrupts are connected to the first one and some
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* to the second one.
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*/
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void __init u300_init_irq(void)
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{
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u32 mask[2] = {0, 0};
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int i;
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for (i = 0; i < NR_IRQS; i++)
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set_bit(i, (unsigned long *) &mask[0]);
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u300_enable_intcon_clock();
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vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0]);
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vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1]);
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}
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/*
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* U300 platforms peripheral handling
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*/
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struct db_chip {
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u16 chipid;
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const char *name;
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};
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/*
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* This is a list of the Digital Baseband chips used in the U300 platform.
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*/
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static struct db_chip db_chips[] __initdata = {
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{
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.chipid = 0xb800,
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.name = "DB3000",
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},
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{
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.chipid = 0xc000,
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.name = "DB3100",
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},
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{
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.chipid = 0xc800,
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.name = "DB3150",
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},
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{
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.chipid = 0xd800,
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.name = "DB3200",
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},
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{
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.chipid = 0xe000,
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.name = "DB3250",
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},
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{
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.chipid = 0xe800,
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.name = "DB3210",
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},
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{
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.chipid = 0xf000,
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.name = "DB3350 P1x",
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},
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{
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.chipid = 0xf100,
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.name = "DB3350 P2x",
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},
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{
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.chipid = 0x0000, /* List terminator */
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.name = NULL,
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}
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};
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static void u300_init_check_chip(void)
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{
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u16 val;
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struct db_chip *chip;
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const char *chipname;
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const char unknown[] = "UNKNOWN";
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/* Read out and print chip ID */
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val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
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/* This is in funky bigendian order... */
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val = (val & 0xFFU) << 8 | (val >> 8);
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chip = db_chips;
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|
chipname = unknown;
|
|
|
|
for ( ; chip->chipid; chip++) {
|
|
if (chip->chipid == (val & 0xFF00U)) {
|
|
chipname = chip->name;
|
|
break;
|
|
}
|
|
}
|
|
printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
|
|
"(chip ID 0x%04x)\n", chipname, val);
|
|
|
|
#ifdef CONFIG_MACH_U300_BS26
|
|
if ((val & 0xFF00U) != 0xc800) {
|
|
printk(KERN_ERR "Platform configured for BS25/BS26 " \
|
|
"with DB3150 but %s detected, expect problems!",
|
|
chipname);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_MACH_U300_BS330
|
|
if ((val & 0xFF00U) != 0xd800) {
|
|
printk(KERN_ERR "Platform configured for BS330 " \
|
|
"with DB3200 but %s detected, expect problems!",
|
|
chipname);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_MACH_U300_BS335
|
|
if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
|
|
printk(KERN_ERR "Platform configured for BS365 " \
|
|
" with DB3350 but %s detected, expect problems!",
|
|
chipname);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_MACH_U300_BS365
|
|
if ((val & 0xFF00U) != 0xe800) {
|
|
printk(KERN_ERR "Platform configured for BS365 " \
|
|
"with DB3210 but %s detected, expect problems!",
|
|
chipname);
|
|
}
|
|
#endif
|
|
|
|
|
|
}
|
|
|
|
/*
|
|
* Some devices and their resources require reserved physical memory from
|
|
* the end of the available RAM. This function traverses the list of devices
|
|
* and assigns actual adresses to these.
|
|
*/
|
|
static void __init u300_assign_physmem(void)
|
|
{
|
|
unsigned long curr_start = __pa(high_memory);
|
|
int i, j;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
|
|
for (j = 0; j < platform_devs[i]->num_resources; j++) {
|
|
struct resource *const res =
|
|
&platform_devs[i]->resource[j];
|
|
|
|
if (IORESOURCE_MEM == res->flags &&
|
|
0 == res->start) {
|
|
res->start = curr_start;
|
|
res->end += curr_start;
|
|
curr_start += (res->end - res->start + 1);
|
|
|
|
printk(KERN_INFO "core.c: Mapping RAM " \
|
|
"%#x-%#x to device %s:%s\n",
|
|
res->start, res->end,
|
|
platform_devs[i]->name, res->name);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void __init u300_init_devices(void)
|
|
{
|
|
int i;
|
|
u16 val;
|
|
|
|
/* Check what platform we run and print some status information */
|
|
u300_init_check_chip();
|
|
|
|
/* Set system to run at PLL208, max performance, a known state. */
|
|
val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
|
|
val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
|
|
writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
|
|
/* Wait for the PLL208 to lock if not locked in yet */
|
|
while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
|
|
U300_SYSCON_CSR_PLL208_LOCK_IND));
|
|
|
|
/* Register the AMBA devices in the AMBA bus abstraction layer */
|
|
u300_clock_primecells();
|
|
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
|
|
struct amba_device *d = amba_devs[i];
|
|
amba_device_register(d, &iomem_resource);
|
|
}
|
|
u300_unclock_primecells();
|
|
|
|
u300_assign_physmem();
|
|
|
|
/* Register the platform devices */
|
|
platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
|
|
|
|
#ifndef CONFIG_MACH_U300_SEMI_IS_SHARED
|
|
/*
|
|
* Enable SEMI self refresh. Self-refresh of the SDRAM is entered when
|
|
* both subsystems are requesting this mode.
|
|
* If we not share the Acc SDRAM, this is never the case. Therefore
|
|
* enable it here from the App side.
|
|
*/
|
|
val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
|
|
U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
|
|
writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
|
|
#endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */
|
|
}
|
|
|
|
static int core_module_init(void)
|
|
{
|
|
/*
|
|
* This needs to be initialized later: it needs the input framework
|
|
* to be initialized first.
|
|
*/
|
|
return mmc_init(&mmcsd_device);
|
|
}
|
|
module_init(core_module_init);
|