b78d8e59a6
The patch makes necessary changes on gpio-mxc as below to turn it into an upstanding gpio driver. * Add a list to save all mx2 ports references, so that mx2_gpio_irq_handler can walk through all interrupt status registers * Use readl/writel to replace mach-specific accessors __raw_readl/__raw_writel * Change mxc_gpio_init into mxc_gpio_probe function * Move "struct mxc_gpio_port" into gpio-mxc.c, as it needs not to be public at all, and also make some other cleanup on plat-mxc/include/mach/gpio.h at the same time And the patch then migrates mach-imx and mach-mx5 to the updated driver by adding corresponding platform devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
/*
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* author: Sascha Hauer
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* Created: april 20th, 2004
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* Copyright: Synertronixx GmbH
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*
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* Common code for i.MX1 machines
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/mach/map.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/iomux-v1.h>
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static struct map_desc imx_io_desc[] __initdata = {
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imx_map_entry(MX1, IO, MT_DEVICE),
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};
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void __init mx1_map_io(void)
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{
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iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
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}
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void __init imx1_init_early(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX1);
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mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR));
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imx_iomuxv1_init(MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
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MX1_NUM_GPIO_PORT);
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}
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void __init mx1_init_irq(void)
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{
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mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR));
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}
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void __init imx1_soc_init(void)
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{
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mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTA, 0);
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mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTB, 0);
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mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTC, 0);
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mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_4K, MX1_GPIO_INT_PORTD, 0);
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}
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