69ac71d370
mxc_device_init() is a core_initcall function used to register devices for mxc_aips_bus and mxc_ahb_bus, which are needed by gpio and dma device registration. Instead of being a core_initcall function, we have it called in soc specific initialization function before gpio and dma devices get registered, so that it will not be called for other platforms when we enable multi-platform support for imx. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
99 lines
2.9 KiB
C
99 lines
2.9 KiB
C
/*
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* arch/arm/mach-imx/mm-imx21.c
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*
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* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/pinctrl/machine.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "devices/devices-common.h"
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#include "hardware.h"
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#include "iomux-v1.h"
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/* MX21 memory map definition */
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static struct map_desc imx21_io_desc[] __initdata = {
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/*
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* this fixed mapping covers:
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* - AIPI1
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* - AIPI2
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* - AITC
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* - ROM Patch
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* - and some reserved space
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*/
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imx_map_entry(MX21, AIPI, MT_DEVICE),
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/*
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* this fixed mapping covers:
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* - CSI
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* - ATA
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*/
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imx_map_entry(MX21, SAHB1, MT_DEVICE),
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/*
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* this fixed mapping covers:
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* - EMI
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*/
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imx_map_entry(MX21, X_MEMC, MT_DEVICE),
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};
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/*
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* Initialize the memory map. It is called during the
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* system startup to create static physical to virtual
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* memory map for the IO modules.
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*/
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void __init mx21_map_io(void)
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{
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iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
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}
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void __init imx21_init_early(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX21);
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mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
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imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR),
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MX21_NUM_GPIO_PORT);
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}
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void __init mx21_init_irq(void)
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{
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mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
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}
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static const struct resource imx21_audmux_res[] __initconst = {
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DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K),
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};
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void __init imx21_soc_init(void)
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{
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mxc_device_init();
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mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
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pinctrl_provide_dummies();
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imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,
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MX21_INT_DMACH0, 0); /* No ERR irq */
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platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
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ARRAY_SIZE(imx21_audmux_res));
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}
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