8060ef4da9
This patch adds support to configure the AEMIF interface with supplied timing values. Since this capability is useful both from NOR and NAND flashes, it is provided as a new interface and in a file of its own. AEMIF timing configuration is required in cases: 1) Where the AEMIF clock rate can change at runtime (a side affect of cpu frequency change). 2) Where U-Boot does not support NAND/NOR but supports other media like SPI Flash or MMC/SD and thus does not care about setting up the AEMIF timing for kernel to use. 3) Where U-Boot just hasn't configured the timing values and cannot be upgraded because the box is already in the field. Since there is now a header file for AEMIF interface, the common (non-NAND specific) defines for AEMIF registers have been moved from nand.h into the newly created aemif.h Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
36 lines
780 B
C
36 lines
780 B
C
/*
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* TI DaVinci AEMIF support
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*
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* Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef _MACH_DAVINCI_AEMIF_H
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#define _MACH_DAVINCI_AEMIF_H
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#define NRCSR_OFFSET 0x00
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#define AWCCR_OFFSET 0x04
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#define A1CR_OFFSET 0x10
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#define ACR_ASIZE_MASK 0x3
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#define ACR_EW_MASK BIT(30)
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#define ACR_SS_MASK BIT(31)
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/* All timings in nanoseconds */
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struct davinci_aemif_timing {
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u8 wsetup;
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u8 wstrobe;
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u8 whold;
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u8 rsetup;
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u8 rstrobe;
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u8 rhold;
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u8 ta;
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};
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int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
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void __iomem *base, unsigned cs);
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#endif
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