c4c4594b00
Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
320 lines
8.2 KiB
ArmAsm
320 lines
8.2 KiB
ArmAsm
/*
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* arch/xtensa/lib/usercopy.S
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*
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* Copy to/from user space (derived from arch/xtensa/lib/hal/memcopy.S)
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*
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* DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>.
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* It needs to remain separate and distinct. The hal files are part
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* of the Xtensa link-time HAL, and those files may differ per
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* processor configuration. Patching the kernel for another
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* processor configuration includes replacing the hal files, and we
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* could lose the special functionality for accessing user-space
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* memory during such a patch. We sacrifice a little code space here
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* in favor to simplify code maintenance.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Copyright (C) 2002 Tensilica Inc.
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*/
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/*
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* size_t __xtensa_copy_user (void *dst, const void *src, size_t len);
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*
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* The returned value is the number of bytes not copied. Implies zero
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* is success.
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*
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* The general case algorithm is as follows:
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* If the destination and source are both aligned,
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* do 16B chunks with a loop, and then finish up with
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* 8B, 4B, 2B, and 1B copies conditional on the length.
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* If destination is aligned and source unaligned,
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* do the same, but use SRC to align the source data.
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* If destination is unaligned, align it by conditionally
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* copying 1B and 2B and then retest.
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* This code tries to use fall-through braches for the common
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* case of aligned destinations (except for the branches to
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* the alignment label).
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*
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* Register use:
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* a0/ return address
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* a1/ stack pointer
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* a2/ return value
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* a3/ src
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* a4/ length
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* a5/ dst
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* a6/ tmp
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* a7/ tmp
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* a8/ tmp
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* a9/ tmp
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* a10/ tmp
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* a11/ original length
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*/
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#include <variant/core.h>
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#ifdef __XTENSA_EB__
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#define ALIGN(R, W0, W1) src R, W0, W1
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#define SSA8(R) ssa8b R
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#else
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#define ALIGN(R, W0, W1) src R, W1, W0
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#define SSA8(R) ssa8l R
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#endif
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/* Load or store instructions that may cause exceptions use the EX macro. */
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#define EX(insn,reg1,reg2,offset,handler) \
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9: insn reg1, reg2, offset; \
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.section __ex_table, "a"; \
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.word 9b, handler; \
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.previous
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.text
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.align 4
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.global __xtensa_copy_user
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.type __xtensa_copy_user,@function
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__xtensa_copy_user:
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entry sp, 16 # minimal stack frame
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# a2/ dst, a3/ src, a4/ len
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mov a5, a2 # copy dst so that a2 is return value
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mov a11, a4 # preserve original len for error case
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.Lcommon:
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bbsi.l a2, 0, .Ldst1mod2 # if dst is 1 mod 2
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bbsi.l a2, 1, .Ldst2mod4 # if dst is 2 mod 4
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.Ldstaligned: # return here from .Ldstunaligned when dst is aligned
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srli a7, a4, 4 # number of loop iterations with 16B
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# per iteration
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movi a8, 3 # if source is also aligned,
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bnone a3, a8, .Laligned # then use word copy
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SSA8( a3) # set shift amount from byte offset
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bnez a4, .Lsrcunaligned
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movi a2, 0 # return success for len==0
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retw
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/*
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* Destination is unaligned
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*/
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.Ldst1mod2: # dst is only byte aligned
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bltui a4, 7, .Lbytecopy # do short copies byte by byte
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# copy 1 byte
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EX(l8ui, a6, a3, 0, l_fixup)
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addi a3, a3, 1
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EX(s8i, a6, a5, 0, s_fixup)
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addi a5, a5, 1
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addi a4, a4, -1
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bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then
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# return to main algorithm
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.Ldst2mod4: # dst 16-bit aligned
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# copy 2 bytes
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bltui a4, 6, .Lbytecopy # do short copies byte by byte
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EX(l8ui, a6, a3, 0, l_fixup)
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EX(l8ui, a7, a3, 1, l_fixup)
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addi a3, a3, 2
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EX(s8i, a6, a5, 0, s_fixup)
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EX(s8i, a7, a5, 1, s_fixup)
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addi a5, a5, 2
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addi a4, a4, -2
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j .Ldstaligned # dst is now aligned, return to main algorithm
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/*
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* Byte by byte copy
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*/
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.align 4
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.byte 0 # 1 mod 4 alignment for LOOPNEZ
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# (0 mod 4 alignment for LBEG)
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.Lbytecopy:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lbytecopydone
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a4, .Lbytecopydone
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add a7, a3, a4 # a7 = end address for source
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lnextbyte:
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EX(l8ui, a6, a3, 0, l_fixup)
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addi a3, a3, 1
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EX(s8i, a6, a5, 0, s_fixup)
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addi a5, a5, 1
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#if !XCHAL_HAVE_LOOPS
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blt a3, a7, .Lnextbyte
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbytecopydone:
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movi a2, 0 # return success for len bytes copied
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retw
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/*
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* Destination and source are word-aligned.
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*/
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# copy 16 bytes per iteration for word-aligned dst and word-aligned src
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.align 4 # 1 mod 4 alignment for LOOPNEZ
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.byte 0 # (0 mod 4 alignment for LBEG)
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.Laligned:
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .Loop1done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .Loop1done
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slli a8, a7, 4
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add a8, a8, a3 # a8 = end of last 16B source chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1:
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EX(l32i, a6, a3, 0, l_fixup)
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EX(l32i, a7, a3, 4, l_fixup)
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EX(s32i, a6, a5, 0, s_fixup)
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EX(l32i, a6, a3, 8, l_fixup)
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EX(s32i, a7, a5, 4, s_fixup)
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EX(l32i, a7, a3, 12, l_fixup)
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EX(s32i, a6, a5, 8, s_fixup)
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addi a3, a3, 16
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EX(s32i, a7, a5, 12, s_fixup)
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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blt a3, a8, .Loop1
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1done:
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bbci.l a4, 3, .L2
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# copy 8 bytes
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EX(l32i, a6, a3, 0, l_fixup)
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EX(l32i, a7, a3, 4, l_fixup)
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addi a3, a3, 8
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EX(s32i, a6, a5, 0, s_fixup)
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EX(s32i, a7, a5, 4, s_fixup)
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addi a5, a5, 8
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.L2:
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bbci.l a4, 2, .L3
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# copy 4 bytes
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EX(l32i, a6, a3, 0, l_fixup)
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addi a3, a3, 4
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EX(s32i, a6, a5, 0, s_fixup)
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addi a5, a5, 4
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.L3:
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bbci.l a4, 1, .L4
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# copy 2 bytes
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EX(l16ui, a6, a3, 0, l_fixup)
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addi a3, a3, 2
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EX(s16i, a6, a5, 0, s_fixup)
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addi a5, a5, 2
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.L4:
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bbci.l a4, 0, .L5
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# copy 1 byte
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EX(l8ui, a6, a3, 0, l_fixup)
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EX(s8i, a6, a5, 0, s_fixup)
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.L5:
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movi a2, 0 # return success for len bytes copied
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retw
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/*
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* Destination is aligned, Source is unaligned
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*/
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.align 4
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.byte 0 # 1 mod 4 alignement for LOOPNEZ
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# (0 mod 4 alignment for LBEG)
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.Lsrcunaligned:
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# copy 16 bytes per iteration for word-aligned dst and unaligned src
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and a10, a3, a8 # save unalignment offset for below
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sub a3, a3, a10 # align a3 (to avoid sim warnings only; not needed for hardware)
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EX(l32i, a6, a3, 0, l_fixup) # load first word
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .Loop2done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .Loop2done
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slli a10, a7, 4
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add a10, a10, a3 # a10 = end of last 16B source chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop2:
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EX(l32i, a7, a3, 4, l_fixup)
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EX(l32i, a8, a3, 8, l_fixup)
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ALIGN( a6, a6, a7)
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EX(s32i, a6, a5, 0, s_fixup)
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EX(l32i, a9, a3, 12, l_fixup)
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ALIGN( a7, a7, a8)
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EX(s32i, a7, a5, 4, s_fixup)
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EX(l32i, a6, a3, 16, l_fixup)
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ALIGN( a8, a8, a9)
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EX(s32i, a8, a5, 8, s_fixup)
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addi a3, a3, 16
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ALIGN( a9, a9, a6)
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EX(s32i, a9, a5, 12, s_fixup)
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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blt a3, a10, .Loop2
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop2done:
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bbci.l a4, 3, .L12
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# copy 8 bytes
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EX(l32i, a7, a3, 4, l_fixup)
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EX(l32i, a8, a3, 8, l_fixup)
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ALIGN( a6, a6, a7)
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EX(s32i, a6, a5, 0, s_fixup)
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addi a3, a3, 8
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ALIGN( a7, a7, a8)
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EX(s32i, a7, a5, 4, s_fixup)
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addi a5, a5, 8
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mov a6, a8
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.L12:
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bbci.l a4, 2, .L13
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# copy 4 bytes
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EX(l32i, a7, a3, 4, l_fixup)
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addi a3, a3, 4
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ALIGN( a6, a6, a7)
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EX(s32i, a6, a5, 0, s_fixup)
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addi a5, a5, 4
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mov a6, a7
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.L13:
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add a3, a3, a10 # readjust a3 with correct misalignment
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bbci.l a4, 1, .L14
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# copy 2 bytes
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EX(l8ui, a6, a3, 0, l_fixup)
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EX(l8ui, a7, a3, 1, l_fixup)
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addi a3, a3, 2
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EX(s8i, a6, a5, 0, s_fixup)
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EX(s8i, a7, a5, 1, s_fixup)
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addi a5, a5, 2
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.L14:
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bbci.l a4, 0, .L15
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# copy 1 byte
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EX(l8ui, a6, a3, 0, l_fixup)
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EX(s8i, a6, a5, 0, s_fixup)
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.L15:
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movi a2, 0 # return success for len bytes copied
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retw
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.section .fixup, "ax"
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.align 4
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/* a2 = original dst; a5 = current dst; a11= original len
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* bytes_copied = a5 - a2
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* retval = bytes_not_copied = original len - bytes_copied
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* retval = a11 - (a5 - a2)
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*
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* Clearing the remaining pieces of kernel memory plugs security
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* holes. This functionality is the equivalent of the *_zeroing
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* functions that some architectures provide.
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*/
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.Lmemset:
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.word memset
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s_fixup:
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sub a2, a5, a2 /* a2 <-- bytes copied */
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sub a2, a11, a2 /* a2 <-- bytes not copied */
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retw
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l_fixup:
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sub a2, a5, a2 /* a2 <-- bytes copied */
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sub a2, a11, a2 /* a2 <-- bytes not copied == return value */
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/* void *memset(void *s, int c, size_t n); */
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mov a6, a5 /* s */
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movi a7, 0 /* c */
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mov a8, a2 /* n */
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l32r a4, .Lmemset
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callx4 a4
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/* Ignore memset return value in a6. */
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/* a2 still contains bytes not copied. */
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retw
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