kernel-fxtec-pro1x/arch/powerpc/perf
Joel Stanley b50a6c584b powerpc/perf: Clear MMCR2 when enabling PMU
On POWER8 when switching to a KVM guest we set bits in MMCR2 to freeze
the PMU counters. Aside from on boot they are then never reset,
resulting in stuck perf counters for any user in the guest or host.

We now set MMCR2 to 0 whenever enabling the PMU, which provides a sane
state for perf to use the PMU counters under either the guest or the
host.

This was manifesting as a bug with ppc64_cpu --frequency:

    $ sudo ppc64_cpu --frequency
    WARNING: couldn't run on cpu 0
    WARNING: couldn't run on cpu 8
      ...
    WARNING: couldn't run on cpu 144
    WARNING: couldn't run on cpu 152
    min:    18446744073.710 GHz (cpu -1)
    max:    0.000 GHz (cpu -1)
    avg:    0.000 GHz

The command uses a perf counter to measure CPU cycles over a fixed
amount of time, in order to approximate the frequency of the machine.
The counters were returning zero once a guest was started, regardless of
weather it was still running or had been shut down.

By dumping the value of MMCR2, it was observed that once a guest is
running MMCR2 is set to 1s - which stops counters from running:

    $ sudo sh -c 'echo p > /proc/sysrq-trigger'
    CPU: 0 PMU registers, ppmu = POWER8 n_counters = 6
    PMC1:  5b635e38 PMC2: 00000000 PMC3: 00000000 PMC4: 00000000
    PMC5:  1bf5a646 PMC6: 5793d378 PMC7: deadbeef PMC8: deadbeef
    MMCR0: 0000000080000000 MMCR1: 000000001e000000 MMCRA: 0000040000000000
    MMCR2: fffffffffffffc00 EBBHR: 0000000000000000
    EBBRR: 0000000000000000 BESCR: 0000000000000000
    SIAR:  00000000000a51cc SDAR:  c00000000fc40000 SIER:  0000000001000000

This is done unconditionally in book3s_hv_interrupts.S upon entering the
guest, and the original value is only save/restored if the host has
indicated it was using the PMU. This is okay, however the user of the
PMU needs to ensure that it is in a defined state when it starts using
it.

Fixes: e05b9b9e5c ("powerpc/perf: Power8 PMU support")
Cc: stable@vger.kernel.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-11 12:55:08 +10:00
..
bhrb.S powerpc/perf: Add basic assembly code to read BHRB entries on POWER8 2013-04-26 16:11:11 +10:00
callchain.c powerpc/perf: Use perf_instruction_pointer in callchains 2012-07-10 19:18:46 +10:00
core-book3s.c powerpc/perf: Clear MMCR2 when enabling PMU 2014-07-11 12:55:08 +10:00
core-fsl-emb.c powerpc/perf: add 2 additional performance monitor counters for e6500 core 2013-08-07 18:38:03 -05:00
e500-pmu.c powerpc/perf: Add stalled-cycles events 2013-01-10 17:00:56 +11:00
e6500-pmu.c powerpc/perf: Add e6500 PMU driver 2013-08-07 18:38:04 -05:00
hv-24x7-catalog.h powerpc/perf: Add 24x7 interface headers 2014-03-24 09:48:29 +11:00
hv-24x7.c powerpc/perf/hv-24x7: Catalog version number is be64, not be32 2014-04-28 16:31:50 +10:00
hv-24x7.h powerpc/perf: Add 24x7 interface headers 2014-03-24 09:48:29 +11:00
hv-common.c powerpc/perf: Add a shared interface to get gpci version and capabilities 2014-03-24 09:48:30 +11:00
hv-common.h powerpc/perf: Add macros for defining event fields & formats 2014-03-24 09:48:31 +11:00
hv-gpci.c powerpc/perf/hv-gpci: Make device attr static 2014-04-28 13:11:26 +10:00
hv-gpci.h powerpc/perf: Add hv_gpci interface header 2014-03-24 09:48:29 +11:00
Makefile powerpc/perf: Add kconfig option for hypervisor provided counters 2014-03-24 09:48:32 +11:00
mpc7450-pmu.c
power4-pmu.c
power5+-pmu.c powerpc/perf: Add an explict flag indicating presence of SLOT field 2013-04-26 16:11:07 +10:00
power5-pmu.c powerpc/perf: Add an explict flag indicating presence of SLOT field 2013-04-26 16:11:07 +10:00
power6-pmu.c
power7-events-list.h powerpc/perf: Make some new raw event codes available in sysfs 2014-03-24 09:48:23 +11:00
power7-pmu.c perf tools: Make Power7 events available for perf 2013-07-12 13:46:09 -03:00
power8-pmu.c powerpc/perf: Add PPMU_ARCH_207S define 2014-07-11 12:55:07 +10:00
ppc970-pmu.c