af8d1c63af
All the mvebu SoCs have information related to their variant and
revision that can be read from the PCI control register.
This patch adds support for Armada XP and Armada 370. This reading of
the revision and the ID are done before the PCI initialization to
avoid any conflicts. Once these data are retrieved, the resources are
freed to let the PCI subsystem use it.
Cc: stable@vger.kernel.org # v3.12+
Fixes: 930ab3d403 (i2c: mv64xxx: Add I2C Transaction Generator support)
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
32 lines
755 B
C
32 lines
755 B
C
/*
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* Marvell EBU SoC ID and revision definitions.
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*
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* Copyright (C) 2014 Marvell Semiconductor
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __LINUX_MVEBU_SOC_ID_H
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#define __LINUX_MVEBU_SOC_ID_H
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/* Armada XP ID */
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#define MV78230_DEV_ID 0x7823
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#define MV78260_DEV_ID 0x7826
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#define MV78460_DEV_ID 0x7846
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/* Armada XP Revision */
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#define MV78XX0_A0_REV 0x1
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#define MV78XX0_B0_REV 0x2
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#ifdef CONFIG_ARCH_MVEBU
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int mvebu_get_soc_id(u32 *dev, u32 *rev);
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#else
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static inline int mvebu_get_soc_id(u32 *dev, u32 *rev)
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{
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return -1;
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}
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#endif
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#endif /* __LINUX_MVEBU_SOC_ID_H */
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