167 lines
4 KiB
C
167 lines
4 KiB
C
/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* arch/mips/ddb5xxx/ddb5477/irq_5477.c
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* This file defines the irq handler for Vrc5477.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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/*
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* Vrc5477 defines 32 IRQs.
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*
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* This file exports one function:
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* vrc5477_irq_init(u32 irq_base);
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*/
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <asm/debug.h>
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#include <asm/ddb5xxx/ddb5xxx.h>
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/* number of total irqs supported by Vrc5477 */
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#define NUM_5477_IRQ 32
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static int vrc5477_irq_base = -1;
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static void
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vrc5477_irq_enable(unsigned int irq)
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{
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db_assert(vrc5477_irq_base != -1);
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db_assert(irq >= vrc5477_irq_base);
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db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ);
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ll_vrc5477_irq_enable(irq - vrc5477_irq_base);
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}
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static void
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vrc5477_irq_disable(unsigned int irq)
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{
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db_assert(vrc5477_irq_base != -1);
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db_assert(irq >= vrc5477_irq_base);
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db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ);
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ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
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}
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static unsigned int vrc5477_irq_startup(unsigned int irq)
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{
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vrc5477_irq_enable(irq);
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return 0;
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}
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#define vrc5477_irq_shutdown vrc5477_irq_disable
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static void
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vrc5477_irq_ack(unsigned int irq)
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{
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db_assert(vrc5477_irq_base != -1);
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db_assert(irq >= vrc5477_irq_base);
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db_assert(irq < vrc5477_irq_base+ NUM_5477_IRQ);
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/* clear the interrupt bit */
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/* some irqs require the driver to clear the sources */
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ddb_out32(DDB_INTCLR32, 1 << (irq - vrc5477_irq_base));
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/* disable interrupt - some handler will re-enable the irq
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* and if the interrupt is leveled, we will have infinite loop
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*/
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ll_vrc5477_irq_disable(irq - vrc5477_irq_base);
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}
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static void
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vrc5477_irq_end(unsigned int irq)
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{
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db_assert(vrc5477_irq_base != -1);
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db_assert(irq >= vrc5477_irq_base);
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db_assert(irq < vrc5477_irq_base + NUM_5477_IRQ);
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if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
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ll_vrc5477_irq_enable( irq - vrc5477_irq_base);
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}
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hw_irq_controller vrc5477_irq_controller = {
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.typename = "vrc5477_irq",
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.startup = vrc5477_irq_startup,
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.shutdown = vrc5477_irq_shutdown,
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.enable = vrc5477_irq_enable,
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.disable = vrc5477_irq_disable,
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.ack = vrc5477_irq_ack,
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.end = vrc5477_irq_end
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};
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void __init vrc5477_irq_init(u32 irq_base)
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{
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u32 i;
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for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = NULL;
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irq_desc[i].depth = 1;
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irq_desc[i].handler = &vrc5477_irq_controller;
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}
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vrc5477_irq_base = irq_base;
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}
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void ll_vrc5477_irq_route(int vrc5477_irq, int ip)
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{
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u32 reg_value;
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u32 reg_bitmask;
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u32 reg_index;
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db_assert(vrc5477_irq >= 0);
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db_assert(vrc5477_irq < NUM_5477_IRQ);
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db_assert(ip >= 0);
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db_assert((ip < 5) || (ip == 6));
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reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
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reg_value = ddb_in32(reg_index);
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reg_bitmask = 7 << (vrc5477_irq % 8 * 4);
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reg_value &= ~reg_bitmask;
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reg_value |= ip << (vrc5477_irq % 8 * 4);
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ddb_out32(reg_index, reg_value);
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}
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void ll_vrc5477_irq_enable(int vrc5477_irq)
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{
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u32 reg_value;
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u32 reg_bitmask;
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u32 reg_index;
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db_assert(vrc5477_irq >= 0);
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db_assert(vrc5477_irq < NUM_5477_IRQ);
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reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
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reg_value = ddb_in32(reg_index);
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reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
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db_assert((reg_value & reg_bitmask) == 0);
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ddb_out32(reg_index, reg_value | reg_bitmask);
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}
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void ll_vrc5477_irq_disable(int vrc5477_irq)
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{
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u32 reg_value;
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u32 reg_bitmask;
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u32 reg_index;
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db_assert(vrc5477_irq >= 0);
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db_assert(vrc5477_irq < NUM_5477_IRQ);
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reg_index = DDB_INTCTRL0 + vrc5477_irq/8*4;
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reg_value = ddb_in32(reg_index);
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reg_bitmask = 8 << (vrc5477_irq % 8 * 4);
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/* we assert that the interrupt is enabled (perhaps over-zealous) */
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db_assert( (reg_value & reg_bitmask) != 0);
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ddb_out32(reg_index, reg_value & ~reg_bitmask);
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}
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