104f9c471f
xtensa supports read_persisitent_clock(), so there is no reason for the arch specific code to be setting xtime. Setting xtime will be done by the generic timekeeping code. Signed-off-by: John Stultz <johnstul@us.ibm.com> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
132 lines
3 KiB
C
132 lines
3 KiB
C
/*
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* arch/xtensa/kernel/time.c
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*
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* Timer and clock support.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2005 Tensilica Inc.
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*
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* Chris Zankel <chris@zankel.net>
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
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#include <linux/delay.h>
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#include <asm/timex.h>
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#include <asm/platform.h>
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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unsigned long ccount_per_jiffy; /* per 1/HZ */
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unsigned long nsec_per_ccount; /* nsec per ccount increment */
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#endif
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static cycle_t ccount_read(void)
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{
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return (cycle_t)get_ccount();
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}
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static struct clocksource ccount_clocksource = {
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.name = "ccount",
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.rating = 200,
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.read = ccount_read,
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.mask = CLOCKSOURCE_MASK(32),
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/*
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* With a shift of 22 the lower limit of the cpu clock is
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* 1MHz, where NSEC_PER_CCOUNT is 1000 or a bit less than
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* 2^10: Since we have 32 bits and the multiplicator can
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* already take up as much as 10 bits, this leaves us with
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* remaining upper 22 bits.
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*/
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.shift = 22,
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};
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static irqreturn_t timer_interrupt(int irq, void *dev_id);
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED,
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.name = "timer",
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};
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void __init time_init(void)
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{
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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printk("Calibrating CPU frequency ");
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platform_calibrate_ccount();
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printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ),
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(int)(ccount_per_jiffy/(10000/HZ))%100);
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#endif
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ccount_clocksource.mult =
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clocksource_hz2mult(CCOUNT_PER_JIFFY * HZ,
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ccount_clocksource.shift);
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clocksource_register(&ccount_clocksource);
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/* Initialize the linux timer interrupt. */
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setup_irq(LINUX_TIMER_INT, &timer_irqaction);
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set_linux_timer(get_ccount() + CCOUNT_PER_JIFFY);
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}
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/*
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* The timer interrupt is called HZ times per second.
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*/
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irqreturn_t timer_interrupt (int irq, void *dev_id)
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{
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unsigned long next;
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next = get_linux_timer();
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again:
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while ((signed long)(get_ccount() - next) > 0) {
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profile_tick(CPU_PROFILING);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(get_irq_regs()));
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#endif
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write_seqlock(&xtime_lock);
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do_timer(1); /* Linux handler in kernel/timer.c */
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/* Note that writing CCOMPARE clears the interrupt. */
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next += CCOUNT_PER_JIFFY;
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set_linux_timer(next);
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write_sequnlock(&xtime_lock);
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}
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/* Allow platform to do something useful (Wdog). */
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platform_heartbeat();
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/* Make sure we didn't miss any tick... */
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if ((signed long)(get_ccount() - next) > 0)
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goto again;
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return IRQ_HANDLED;
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}
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#ifndef CONFIG_GENERIC_CALIBRATE_DELAY
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void __cpuinit calibrate_delay(void)
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{
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loops_per_jiffy = CCOUNT_PER_JIFFY;
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printk("Calibrating delay loop (skipped)... "
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"%lu.%02lu BogoMIPS preset\n",
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loops_per_jiffy/(1000000/HZ),
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(loops_per_jiffy/(10000/HZ)) % 100);
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}
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#endif
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