4bac471da0
Intel Titan Ridge is the next Thunderbolt 3 controller. The ICM firmware message format in Titan Ridge differs from Falcon Ridge and Alpine Ridge somewhat because it is using route strings addressing devices. In addition to that the DMA port of 4-channel (two port) controller is in different port number than the previous controllers. There are some other minor differences as well. This patch add support for Intel Titan Ridge and the new ICM firmware message format. Signed-off-by: Radion Mirchevsky <radion.mirchevsky@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
54 lines
1.8 KiB
C
54 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Thunderbolt Cactus Ridge driver - NHI driver
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*
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* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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*/
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#ifndef DSL3510_H_
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#define DSL3510_H_
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#include <linux/thunderbolt.h>
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enum nhi_fw_mode {
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NHI_FW_SAFE_MODE,
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NHI_FW_AUTH_MODE,
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NHI_FW_EP_MODE,
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NHI_FW_CM_MODE,
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};
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enum nhi_mailbox_cmd {
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NHI_MAILBOX_SAVE_DEVS = 0x05,
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NHI_MAILBOX_DISCONNECT_PCIE_PATHS = 0x06,
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NHI_MAILBOX_DRV_UNLOADS = 0x07,
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NHI_MAILBOX_DISCONNECT_PA = 0x10,
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NHI_MAILBOX_DISCONNECT_PB = 0x11,
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NHI_MAILBOX_ALLOW_ALL_DEVS = 0x23,
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};
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int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data);
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enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi);
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/*
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* PCI IDs used in this driver from Win Ridge forward. There is no
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* need for the PCI quirk anymore as we will use ICM also on Apple
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* hardware.
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*/
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#define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_NHI 0x157d
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#define PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE 0x157e
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI 0x15bf
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE 0x15c0
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI 0x15d2
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE 0x15d3
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI 0x15d9
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE 0x15da
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI 0x15dc
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI 0x15dd
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#define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI 0x15de
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE 0x15e7
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI 0x15e8
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE 0x15ea
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI 0x15eb
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#define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE 0x15ef
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#endif
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