82d16c2351
[ Upstream commit 05942b8c36c7eb5d3fc5e375d4b0d0c49562e85d ]
The USB phy takes some time to reset, so make sure we give it to it. The
delay length was taken from the 4x12 phy driver.
This manifested in issues with the DWC2 driver since commit
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allwinner | ||
amlogic | ||
broadcom | ||
hisilicon | ||
lantiq | ||
marvell | ||
mediatek | ||
motorola | ||
qualcomm | ||
ralink | ||
renesas | ||
rockchip | ||
samsung | ||
st | ||
tegra | ||
ti | ||
Kconfig | ||
Makefile | ||
phy-core.c | ||
phy-lpc18xx-usb-otg.c | ||
phy-pistachio-usb.c | ||
phy-xgene.c |