ae4f073c40
We handle many exceptions at EVT5 (hardware error level) so that we can catch exceptions in our exception handling code. Today - if the global interrupt enable bit (IPEND[4]) is set (interrupts disabled) our trap handling code goes into a infinite loop, since we need interrupts to be on to defer things to EVT5. Normal kernel code should not trigger this for any reason as IPEND[4] gets cleared early (when doing an interrupt context save) and the kernel stack there should be sane (or something much worse is happening in the system). But there have been a few times where this has happened, so this change makes sure we dump a proper crash message even when things have gone south. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> |
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| .. | ||
| arch_checks.c | ||
| cache-c.c | ||
| cache.S | ||
| clocks-init.c | ||
| cpufreq.c | ||
| dpmc.c | ||
| dpmc_modes.S | ||
| entry.S | ||
| head.S | ||
| interrupt.S | ||
| ints-priority.c | ||
| irqpanic.c | ||
| lock.S | ||
| Makefile | ||
| pm.c | ||
| smp.c | ||