aa9ad6ad9c
Add a core for the clksrc clock implementation, which is found in many of the newer Samsung SoCs into plat-samsung. Signed-off-by: Harald Welte <laforge@gnumonks.org> [ben-linux@fluff.org: split from original patch to make change smaller] [ben-linux@fluff.org: split clk and clksrc changes] [ben-linux@fluff.org: moved to plat-samsung from plat-s3c] [ben-linux@fluff.org: re-wrote headers after splits] [ben-linux@fluff.org: added better documentation to headers] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
75 lines
2.3 KiB
C
75 lines
2.3 KiB
C
/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h
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*
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* Parts taken from arch/arm/plat-s3c64xx/clock.c
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* Copyright 2009 Ben Dooks <ben-linux@fluff.org>
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* Copyright 2009 Harald Welte
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/**
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* struct clksrc_sources - list of sources for a given clock
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* @sources: array of pointers to clocks
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* @nr_sources: The size of @sources
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*/
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struct clksrc_sources {
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unsigned int nr_sources;
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struct clk **sources;
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};
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/**
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* struct clksrc_reg - register definition for clock control bits
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* @reg: pointer to the register in virtual memory.
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* @shift: the shift in bits to where the bitfield is.
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* @size: the size in bits of the bitfield.
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*
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* This specifies the size and position of the bits we are interested
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* in within the register specified by @reg.
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*/
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struct clksrc_reg {
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void __iomem *reg;
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unsigned short shift;
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unsigned short size;
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};
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/**
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* struct clksrc_clk - class of clock for newer style samsung devices.
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* @clk: the standard clock representation
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* @sources: the sources for this clock
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* @reg_src: the register definition for selecting the clock's source
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* @reg_div: the register definition for the clock's output divisor
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*
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* This clock implements the features required by the newer SoCs where
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* the standard clock block provides an input mux and a post-mux divisor
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* to provide the periperhal's clock.
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*
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* The array of @sources provides the mapping of mux position to the
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* clock, and @reg_src shows the code where to modify to change the mux
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* position. The @reg_div defines how to change the divider settings on
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* the output.
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*/
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struct clksrc_clk {
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struct clk clk;
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struct clksrc_sources *sources;
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struct clksrc_reg reg_src;
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struct clksrc_reg reg_div;
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};
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extern void s3c_set_clksrc(struct clksrc_clk *clk);
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/**
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* s3c_register_clksrc() register clocks from an array of clksrc clocks
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* @srcs: The array of clocks to register
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* @size: The size of the @srcs array.
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*
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* Initialise and register the array of clocks described by @srcs.
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*/
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extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size);
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