7f4b04614a
Currently cpufreq frequency table has two fields: frequency and driver_data. driver_data is only for drivers' internal use and cpufreq core shouldn't use it at all. But with the introduction of BOOST frequencies, this assumption was broken and we started using it as a flag instead. There are two problems due to this: - It is against the description of this field, as driver's data is used by the core now. - if drivers fill it with -3 for any frequency, then those frequencies are never considered by cpufreq core as it is exactly same as value of CPUFREQ_BOOST_FREQ, i.e. ~2. The best way to get this fixed is by creating another field flags which will be used for such flags. This patch does that. Along with that various drivers need modifications due to the change of struct cpufreq_frequency_table. Reviewed-by: Gautham R Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
92 lines
2.2 KiB
C
92 lines
2.2 KiB
C
#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/cpufreq.h>
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#include <hwregs/reg_map.h>
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#include <hwregs/reg_rdwr.h>
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#include <hwregs/clkgen_defs.h>
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#include <hwregs/ddr2_defs.h>
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static int
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cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
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void *data);
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static struct notifier_block cris_sdram_freq_notifier_block = {
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.notifier_call = cris_sdram_freq_notifier
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};
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static struct cpufreq_frequency_table cris_freq_table[] = {
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{0, 0x01, 6000},
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{0, 0x02, 200000},
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{0, 0, CPUFREQ_TABLE_END},
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};
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static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
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{
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reg_clkgen_rw_clk_ctrl clk_ctrl;
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clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
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return clk_ctrl.pll ? 200000 : 6000;
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}
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static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state)
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{
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reg_clkgen_rw_clk_ctrl clk_ctrl;
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clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
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local_irq_disable();
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/* Even though we may be SMP they will share the same clock
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* so all settings are made on CPU0. */
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if (cris_freq_table[state].frequency == 200000)
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clk_ctrl.pll = 1;
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else
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clk_ctrl.pll = 0;
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REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
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local_irq_enable();
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return 0;
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}
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static int cris_freq_cpu_init(struct cpufreq_policy *policy)
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{
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return cpufreq_generic_init(policy, cris_freq_table, 1000000);
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}
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static struct cpufreq_driver cris_freq_driver = {
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.get = cris_freq_get_cpu_frequency,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = cris_freq_target,
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.init = cris_freq_cpu_init,
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.name = "cris_freq",
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.attr = cpufreq_generic_attr,
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};
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static int __init cris_freq_init(void)
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{
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int ret;
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ret = cpufreq_register_driver(&cris_freq_driver);
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cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
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CPUFREQ_TRANSITION_NOTIFIER);
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return ret;
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}
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static int
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cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
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void *data)
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{
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int i;
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struct cpufreq_freqs *freqs = data;
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if (val == CPUFREQ_PRECHANGE) {
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reg_ddr2_rw_cfg cfg =
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REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
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cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
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if (freqs->new == 200000)
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for (i = 0; i < 50000; i++);
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REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
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}
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return 0;
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}
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module_init(cris_freq_init);
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