kernel-fxtec-pro1x/drivers/fpga
Matthew Gerlach deae6e3a42 fpga: dfl: fix bug in port reset handshake
[ Upstream commit 8614afd689df59d9ce019439389be20bd788a897 ]

When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.

Fixes: 47c1b19c16 (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-29 10:16:48 +02:00
..
altera-cvp.c
altera-fpga2sdram.c
altera-freeze-bridge.c
altera-hps2fpga.c
altera-pr-ip-core-plat.c
altera-pr-ip-core.c
altera-ps-spi.c
dfl-afu-dma-region.c
dfl-afu-main.c
dfl-afu-region.c
dfl-afu.h
dfl-fme-br.c
dfl-fme-main.c
dfl-fme-mgr.c
dfl-fme-pr.c
dfl-fme-pr.h
dfl-fme-region.c
dfl-fme.h
dfl-pci.c
dfl.c
dfl.h
fpga-bridge.c
fpga-mgr.c
fpga-region.c
ice40-spi.c
Kconfig
machxo2-spi.c
Makefile
of-fpga-region.c
socfpga-a10.c
socfpga.c
ts73xx-fpga.c
xilinx-pr-decoupler.c
xilinx-spi.c
zynq-fpga.c