996f545fbb
User-space use mappable BOs notably for fences, and expects that a value update by the GPU will be immediatly visible through the user-space mapping. ARM has a property that may prevent this from happening though: memory can be mapped multiple times only if the different mappings share the same caching properties. However all the lowmem memory is already identity-mapped into the kernel with cache enabled, so when user-space requests an uncached mapping, we actually get an "undefined caching policy" one and this has strange side-effects described on Freedesktop bug 86690. To prevent this from happening, allow user-space to explicitly specify which objects should be coherent, and create such objects with the TTM_PL_FLAG_UNCACHED flag. This will make TTM allocate memory using the DMA API, which will fix the identify mapping and allow us to safely map the objects to user-space uncached. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> |
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armada_drm.h | ||
drm.h | ||
drm_fourcc.h | ||
drm_mode.h | ||
drm_sarea.h | ||
exynos_drm.h | ||
i810_drm.h | ||
i915_drm.h | ||
Kbuild | ||
mga_drm.h | ||
msm_drm.h | ||
nouveau_drm.h | ||
omap_drm.h | ||
qxl_drm.h | ||
r128_drm.h | ||
radeon_drm.h | ||
savage_drm.h | ||
sis_drm.h | ||
tegra_drm.h | ||
via_drm.h | ||
vmwgfx_drm.h |