24ce2705c2
For still better multi-OMAP1 support, expand omap1_rate_table with flags for different SoC types and match them while selecting clock rates. The idea is stolen from current omap24xx clock rate selection algorithm. Since clkdev platform flag definitions are reused here, those had to be expanded with one extra entry for OMAP1710 subtype, as this is the only SoC for which we allow selection of the highest, 216 MHz rate. Once done, remove no longer needed clock rate configure time options. Tested on Amstrad Delta. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
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* clkdev <-> OMAP integration
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*
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* Russell King <linux@arm.linux.org.uk>
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*
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*/
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#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
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#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
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#include <linux/clkdev.h>
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struct omap_clk {
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u16 cpu;
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struct clk_lookup lk;
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};
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#define CLK(dev, con, ck, cp) \
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{ \
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.cpu = cp, \
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.lk = { \
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.dev_id = dev, \
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.con_id = con, \
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.clk = ck, \
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}, \
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}
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/* Platform flags for the clkdev-OMAP integration code */
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#define CK_310 (1 << 0)
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#define CK_7XX (1 << 1) /* 7xx, 850 */
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#define CK_1510 (1 << 2)
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#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
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#define CK_242X (1 << 4)
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#define CK_243X (1 << 5) /* 243x, 253x */
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#define CK_3430ES1 (1 << 6) /* 34xxES1 only */
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#define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */
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#define CK_3505 (1 << 8)
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#define CK_3517 (1 << 9)
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#define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */
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#define CK_443X (1 << 11)
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#define CK_TI816X (1 << 12)
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#define CK_446X (1 << 13)
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#define CK_1710 (1 << 15) /* 1710 extra for rate selection */
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#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
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#define CK_AM35XX (CK_3505 | CK_3517) /* all Sitara AM35xx */
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#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX)
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#endif
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