ffae4e014a
Adds register definitions, shared peripheral interrupt numbers (SHPI) and IO mappings for the U8500 core support. SHPI are assigned to [160:32] where first 32 interrupts are reserved. Reviewed-by: Alessandro Rubin <rubini@unipv.it> Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
22 lines
471 B
C
22 lines
471 B
C
/*
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* arch/arm/mach-u8500/include/mach/io.h
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*
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* Copyright (C) 1997-1999 Russell King
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*
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* Modifications:
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* 06-12-1997 RMK Created.
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* 07-04-1999 RMK Major cleanup
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*/
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#ifndef __ASM_ARM_ARCH_IO_H
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#define __ASM_ARM_ARCH_IO_H
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#define IO_SPACE_LIMIT 0xffffffff
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/*
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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