kernel-fxtec-pro1x/drivers/clk/tegra
Michael Turquette eae14465de clk: tegra: Changes for v4.4-rc1
This contains a patch that allows the DFLL to use clock rates higher
 than 2^31-1 Hz by using the ->determine_rate() operation instead of the
 ->round_rate() operation. Other than that there's a couple of cleanups
 in preparation for Tegra210 support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJWJjSRAAoJEN0jrNd/PrOh9vEP/0fhpVjrPPhnTSAMbdIA6kkB
 5TThz2ja2AyoFTXyPS1SO77LPbk55LXuuTxcEiYDK5kokK8QcbIcYSEWQcbUsYEo
 3gPiFVegmOcp1IZgJhU9RAQmqfWuQJuNYcWpHHFsz2otyVqlGWIyX6n1UzT47nmw
 zYvTFGmke28LMt9GnOR1X8ma3rnefYQw+ZcxSinzXhansKAfXtXpr0ixfCpSlqZl
 7f+mSs5GW8QgJdm5ml4Y7BIk7Fopkr9ic4Js70OxbFmqKu9EU2p4bExFXmdfMQbU
 gq/jd/ZJQjlbNAluGBb7vjzHKN9InjzkxkNHyode8vix411z5Xx2TelYUbayNMh+
 fCyn7Sr4tG2u4OZapH1zYV3YgIW08zQSpdkuq/J/8RuAN35WDYQMld4V7jHt7l0p
 6Z/yVsM2llFwpmLu5DgeVYRXLt/3ConBwcAEn3EnEpQHXJXa9BBD6D3Uv7ErVAyJ
 aKN5p8Ix91/rX6JCa2g5tNTRs1arn5TfDQ2nJpGUmN4/SRMVb6L/ezmcPhqrDXVd
 Cp6xfvRS4TloYxuGbxpmpP+Hwev+GVN0AfEq3jpA7EmOvRLeexnVHhsnIvMbnEqw
 ucigNua0nWEqF0PechSpIIEp0rcdqD70kqNkTK/fzaWXPlg9GyI7W83JsDFh7PF1
 2caoSL9E6jPE5F8L6NMz
 =4qKy
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.4-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

clk: tegra: Changes for v4.4-rc1

This contains a patch that allows the DFLL to use clock rates higher
than 2^31-1 Hz by using the ->determine_rate() operation instead of the
->round_rate() operation. Other than that there's a couple of cleanups
in preparation for Tegra210 support.
2015-10-20 08:49:11 -07:00
..
clk-audio-sync.c
clk-dfll.c clk: tegra: Changes for v4.4-rc1 2015-10-20 08:49:11 -07:00
clk-dfll.h clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00
clk-divider.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-emc.c clk: tegra: delete unneeded of_node_put 2015-10-12 11:52:48 -07:00
clk-id.h clk: tegra: Define PLLD_DSI and remove dsia(b)_mux 2015-02-02 16:22:34 +02:00
clk-periph-gate.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-periph.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-pll-out.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-pll.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-super.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-audio.c clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
clk-tegra-fixed.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-periph.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-pmc.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c clk: tegra: Changes for v4.3-rc1 2015-08-25 15:55:28 -07:00
clk-tegra20.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra30.c clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
clk-tegra114.c clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
clk-tegra124-dfll-fcpu.c clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00
clk-tegra124.c clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
clk.c clk: tegra: Changes for v4.3-rc1 2015-08-25 15:55:28 -07:00
clk.h clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
cvb.c clk: tegra: Unlock top rates for Tegra124 DFLL clock 2015-09-15 12:54:39 +02:00
cvb.h clk: tegra: Add functions for parsing CVB tables 2015-07-16 09:32:47 +02:00
Kconfig clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00
Makefile clk: tegra: Add Tegra124 DFLL clocksource platform driver 2015-07-16 10:39:45 +02:00