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kernel-fxtec-pro1x/arch/arm/mm
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Will Deacon a092f2b153 ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs 
To ensure correct alignment of cacheline-aligned data, the maximum
cacheline size needs to be known at compile time.

Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely
that there will be future ARMv7 implementations with the same line size)
then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline
size. For CPUs with smaller caches, this will result in some harmless
padding but will help with single zImage work and avoid hitting subtle
bugs with misaligned data structures.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:05 +00:00
..
abort-ev4.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev4t.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev5t.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev5tj.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev6.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev7.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-lv4t.S ARM: entry: data abort: ensure r5 is preserved by abort functions 2011-07-02 10:56:12 +01:00
abort-macro.S ARM: 7088/1: entry: fix wrong parameter name used in do_thumb_abort 2011-09-10 23:39:56 +01:00
abort-nommu.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
alignment.c ARM: LPAE: Add fault handling support 2011-12-08 10:30:40 +00:00
cache-fa.S ARM: mm: cache-fa: Use the new processor struct macros 2011-07-07 15:31:05 +01:00
cache-feroceon-l2.c ARM: fix cache-feroceon-l2 after stack based kmap_atomic() 2010-12-19 12:57:16 -05:00
cache-l2x0.c ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds 2011-11-21 13:12:18 +00:00
cache-tauros2.c
cache-v3.S ARM: mm: cache-v3: Use the new processor struct macros 2011-07-07 15:31:05 +01:00
cache-v4.S ARM: mm: cache-v4: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v4wb.S ARM: mm: cache-v4wb: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v4wt.S ARM: mm: cache-v4wt: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v6.S ARM: mm: cache-v6: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v7.S ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed 2011-09-17 12:47:17 +01:00
cache-xsc3l2.c ARM: fix cache-xsc3l2 after stack based kmap_atomic() 2010-12-19 12:57:08 -05:00
context.c ARM: LPAE: Add context switching support 2011-12-08 10:30:40 +00:00
copypage-fa.c ARM: Gemini: fix compiler error in copypage-fa.c 2010-04-27 12:45:10 +02:00
copypage-feroceon.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v3.c
copypage-v4mc.c locking, ARM: Annotate low level hw locks as raw 2011-09-13 11:12:14 +02:00
copypage-v4wb.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v4wt.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v6.c locking, ARM: Annotate low level hw locks as raw 2011-09-13 11:12:14 +02:00
copypage-xsc3.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-xscale.c locking, ARM: Annotate low level hw locks as raw 2011-09-13 11:12:14 +02:00
dma-mapping.c ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocations 2011-11-26 21:58:53 +00:00
extable.c
fault-armv.c arm: remove several unnecessary module.h include instances 2011-10-31 19:30:48 -04:00
fault.c Merge branch 'devel-stable' into for-linus 2012-01-05 13:24:33 +00:00
fault.h ARM: LPAE: Add fault handling support 2011-12-08 10:30:40 +00:00
flush.c Merge branches 'consolidate', 'ep93xx', 'fixes', 'misc', 'mmci', 'remove' and 'spear' into for-linus 2011-05-23 19:27:40 +01:00
fsr-2level.c ARM: LPAE: Move the FSR definitions to separate files 2011-12-08 10:30:37 +00:00
fsr-3level.c ARM: LPAE: Add fault handling support 2011-12-08 10:30:40 +00:00
highmem.c ARM: get rid of kmap_high_l1_vipt() 2010-12-19 12:56:46 -05:00
idmap.c ARM: LPAE: Add identity mapping support for the 3-level page table format 2011-12-08 10:33:28 +00:00
init.c ARM: fix a section mismatch warning with our use of memblock 2012-01-19 17:26:29 +00:00
iomap.c arm: switch to GENERIC_PCI_IOMAP 2011-11-28 21:13:06 +02:00
ioremap.c Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable 2011-12-08 18:02:04 +00:00
Kconfig ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs 2012-01-23 10:20:05 +00:00
Makefile ARM: v6k: introduce CPU_V6K option 2011-02-02 21:23:26 +00:00
mm.h ARM: add generic ioremap optimization by reusing static mappings 2011-11-26 19:21:28 -05:00
mmap.c ARM: 7169/1: topdown mmap support 2011-12-06 11:15:25 +00:00
mmu.c Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable 2011-12-08 18:02:04 +00:00
nommu.c Merge branch 'vmalloc' of git://git.linaro.org/people/nico/linux into devel-stable 2011-12-05 23:27:59 +00:00
pabort-legacy.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pabort-v6.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pabort-v7.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pgd.c ARM: LPAE: Page table maintenance for the 3-level format 2011-12-08 10:30:39 +00:00
proc-arm6_7.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm7tdmi.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm9tdmi.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm720.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm740.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm920.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm922.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm925.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm926.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm940.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm946.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm1020.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm1020e.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm1022.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-arm1026.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-fa526.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-feroceon.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-macros.S ARM: LPAE: MMU setup for the 3-level page table format 2011-12-08 10:30:39 +00:00
proc-mohawk.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-sa110.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-sa1100.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-syms.c
proc-v6.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-v7-2level.S ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S 2011-12-08 10:30:37 +00:00
proc-v7-3level.S ARM: LPAE: MMU setup for the 3-level page table format 2011-12-08 10:30:39 +00:00
proc-v7.S Merge branch 'devel-stable' into for-linus 2012-01-05 13:24:33 +00:00
proc-xsc3.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
proc-xscale.S ARM: proc-*.S: place cpu_reset functions into .idmap.text section 2011-12-06 14:04:14 +00:00
tlb-fa.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
tlb-v3.S ARM: mm: tlb-v3: Use the new processor struct macros 2011-07-07 15:31:11 +01:00
tlb-v4.S ARM: mm: tlb-v4: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v4wb.S ARM: mm: tlb-v4wb: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v4wbi.S ARM: mm: tlb-v4wbi: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v6.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
tlb-v7.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
vmregion.c ARM: DMA: top-down allocation in DMA coherent region 2011-02-23 17:24:11 +00:00
vmregion.h ARM: DMA coherent allocator: align remapped addresses 2010-07-27 10:43:48 +01:00