99ff056193
When LPAE is activated on Armada XP, all registers and IOs are still 32bit, the 40bit extension is on the CPU to DRAM path (windows) only. That means that all the DMA transfer are restricted to the low 32 bits address space. This is limitation is achieved by selecting ZONE_DMA. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
48 lines
1 KiB
Text
48 lines
1 KiB
Text
config ARCH_MVEBU
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bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7
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select CLKSRC_MMIO
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select IRQ_DOMAIN
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select MULTI_IRQ_HANDLER
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select PINCTRL
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select PLAT_ORION
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select SPARSE_IRQ
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select CLKDEV_LOOKUP
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select MVEBU_CLK_CORE
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select MVEBU_CLK_CPU
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select MVEBU_CLK_GATING
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select MVEBU_MBUS
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select ZONE_DMA if ARM_LPAE
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if ARCH_MVEBU
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menu "Marvell SOC with device tree"
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config MACH_ARMADA_370_XP
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bool
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select ARMADA_370_XP_TIMER
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select HAVE_SMP
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select CACHE_L2X0
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select CPU_PJ4B
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config MACH_ARMADA_370
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bool "Marvell Armada 370 boards"
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select MACH_ARMADA_370_XP
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select PINCTRL_ARMADA_370
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help
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Say 'Y' here if you want your kernel to support boards based
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on the Marvell Armada 370 SoC with device tree.
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config MACH_ARMADA_XP
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bool "Marvell Armada XP boards"
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select MACH_ARMADA_370_XP
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select PINCTRL_ARMADA_XP
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help
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Say 'Y' here if you want your kernel to support boards based
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on the Marvell Armada XP SoC with device tree.
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endmenu
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endif
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