f15cbe6f1a
This follows the sparc changes a439fe51a1.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
78 lines
2 KiB
C
78 lines
2 KiB
C
#ifndef __ASM_SH_MMU_CONTEXT_64_H
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#define __ASM_SH_MMU_CONTEXT_64_H
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/*
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* sh64-specific mmu_context interface.
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <cpu/registers.h>
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#include <asm/cacheflush.h>
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#define SR_ASID_MASK 0xffffffffff00ffffULL
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#define SR_ASID_SHIFT 16
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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/* Well, at least free TLB entries */
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flush_tlb_mm(mm);
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long long sr;
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asm volatile ("getcon " __SR ", %0\n\t"
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: "=r" (sr));
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sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
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return (unsigned long) sr;
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}
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/* Set ASID into SR */
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static inline void set_asid(unsigned long asid)
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{
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unsigned long long sr, pc;
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asm volatile ("getcon " __SR ", %0" : "=r" (sr));
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sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
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/*
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* It is possible that this function may be inlined and so to avoid
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* the assembler reporting duplicate symbols we make use of the
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* gas trick of generating symbols using numerics and forward
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* reference.
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*/
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asm volatile ("movi 1, %1\n\t"
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"shlli %1, 28, %1\n\t"
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"or %0, %1, %1\n\t"
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"putcon %1, " __SR "\n\t"
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"putcon %0, " __SSR "\n\t"
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"movi 1f, %1\n\t"
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"ori %1, 1 , %1\n\t"
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"putcon %1, " __SPC "\n\t"
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"rte\n"
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"1:\n\t"
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: "=r" (sr), "=r" (pc) : "0" (sr));
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}
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/* arch/sh/kernel/cpu/sh5/entry.S */
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extern unsigned long switch_and_save_asid(unsigned long new_asid);
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/* No spare register to twiddle, so use a software cache */
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extern pgd_t *mmu_pdtp_cache;
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#define set_TTB(pgd) (mmu_pdtp_cache = (pgd))
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#define get_TTB() (mmu_pdtp_cache)
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#endif /* __ASM_SH_MMU_CONTEXT_64_H */
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