66fa300e60
The Berlin pinctrl documentation was part of the Marvell Berlin SoC documentation because the Berlin pinctrl configuration was inside the chip and the system controllers. With the recent rework of the chip and system controller handling (now an MFD driver registers all sub-devices of the two soc and system controller nodes and each device has its own sub-node), the documentation of the Berlin pinctrl driver can be moved to the generic pinctrl documentation directory. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
43 lines
1.2 KiB
Text
43 lines
1.2 KiB
Text
* Pin-controller driver for the Marvell Berlin SoCs
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Pin control registers are part of both chip controller and system
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controller register sets. Pin controller nodes should be a sub-node of
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either the chip controller or system controller node. The pins
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controlled are organized in groups, so no actual pin information is
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needed.
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A pin-controller node should contain subnodes representing the pin group
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configurations, one per function. Each subnode has the group name and
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the muxing function used.
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Be aware the Marvell Berlin datasheets use the keyword 'mode' for what
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is called a 'function' in the pin-controller subsystem.
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Required properties:
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- compatible: should be one of:
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"marvell,berlin2-soc-pinctrl",
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"marvell,berlin2-system-pinctrl",
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"marvell,berlin2cd-soc-pinctrl",
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"marvell,berlin2cd-system-pinctrl",
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"marvell,berlin2q-soc-pinctrl",
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"marvell,berlin2q-system-pinctrl"
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Required subnode-properties:
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- groups: a list of strings describing the group names.
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- function: a string describing the function used to mux the groups.
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Example:
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sys_pinctrl: pin-controller {
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compatible = "marvell,berlin2q-system-pinctrl";
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uart0_pmux: uart0-pmux {
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groups = "GSM12";
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function = "uart0";
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0_pmux>;
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pinctrl-names = "default";
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};
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