b920de1b77
Add architecture support for the MN10300/AM33 CPUs produced by MEI to the kernel. This patch also adds board support for the ASB2303 with the ASB2308 daughter board, and the ASB2305. The only processor supported is the MN103E010, which is an AM33v2 core plus on-chip devices. [akpm@linux-foundation.org: nuke cvs control strings] Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com> Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
51 lines
1.2 KiB
ArmAsm
51 lines
1.2 KiB
ArmAsm
/* MN10300 64-bit arithmetic left shift
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <asm/cache.h>
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.text
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.balign L1_CACHE_BYTES
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###############################################################################
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#
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# unsigned long long __ashldi3(unsigned long long value [D1:D0],
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# unsigned by [(12,SP)])
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#
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###############################################################################
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.globl __ashldi3
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.type __ashldi3,@function
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__ashldi3:
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mov (12,sp),a0
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and +63,a0
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beq __ashldi3_zero
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cmp +31,a0
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bhi __ashldi3_32plus
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# the count is in the range 1-31
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asl a0,d1
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mov +32,a1
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sub a0,a1,a1 # a1 = 32 - count
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lsr a1,d0,a1 # get overflow from LSW -> MSW
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or_asl a1,d1,a0,d0 # insert overflow into MSW and
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# shift the LSW
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rets
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.balign L1_CACHE_BYTES
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# the count is in the range 32-63
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__ashldi3_32plus:
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asl a0,d0,d1
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clr d0
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__ashldi3_zero:
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rets
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.size __ashldi3, .-__ashldi3
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