ff2e27ae0b
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
24 lines
615 B
C
24 lines
615 B
C
#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
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#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x))
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#define AMBA_DEVICE(name,busid,base,plat) \
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struct amba_device name##_device = { \
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.dev = { \
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.coherent_dma_mask = ~0UL, \
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.init_name = busid, \
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.platform_data = plat, \
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}, \
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.res = { \
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.start = base, \
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.end = base + SZ_4K - 1, \
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.flags = IORESOURCE_MEM, \
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}, \
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.dma_mask = ~0UL, \
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.irq = IRQ_##base, \
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/* .dma = DMA_##base,*/ \
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}
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struct map_desc;
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void v2m_map_io(struct map_desc *tile, size_t num);
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extern struct sys_timer v2m_timer;
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